GE Mini COM Express 10, Справочник по аппаратуре

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6.2 General Configuration Registers
Configuration register access uses a banked logical device method to facilitate standard
plug-and-play software. Each functional block is assigned a separate logical device
number. For index range 0x00-0x2F, the data port accesses map into the general device
configuration registers. One of these registers is the logical device number register. For
index range 0x30-0xFF, the data port accesses map into the configuration registers of the
logical device pointed to by the logical device number register.
General Configuration Registers
Index Name
Description
0x07
Logical Device Number Selects the current logical device
0x20
Device ID High High byte of chip identity number
0x21 Device ID Low
Low byte of chip identity number
0x22 Version
Firmware version (major release) number
0x23 Revision
Firmware revision (minor release) number
0x24
Build Info High High byte of the FPGA Build Information
0x25 Build Info Low
Low byte of the FPGA Build Information
6.2.1 Logical Device Number
This register selects the current logical device.
Logical Device Number Register (Index 0x07)
Bit Name Access Default
Description
7:0 LDN R/W 0x00
Logical device number
0x02: UART 0
0x03: UART 1
0x0A: Board Supervision
0x0C: I2C Controller
0x14: Watchdog Timer
6.2.2 Device ID
The Device ID register allows the software to identify the chip.
Device ID Register (Index 0x20-0x21)
Bit Name Access Default
Description
15:0 ID R 0xCE01 Device identification number
6.2.3 Version
The Version register provides the major load number of the FPGA firmware.
Firmware Version Register (Index 0x22)
Bit Name Access Default
Description
7:0 VER R —
Firmware version (major release)
number
46 GFK-2896 Mini COM Express Type 10 Module mCOM10-L1500
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