PACE Series SCPI Manual
K0472 Revision A
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STATUS SYSTEM
The status reporting system informs the external controller that an event has occurred. This
information is in the form of a service request (SRQ) using IEEE 488 or an SRQ message using
RS232.
The PACE Series uses status reporting as defined in IEEE 488.2 with the implementation of
status registers.
The OPERation status registers have been implemented to comply with the SCPI protocol.
These are registers where the individual bits are summary bits of the status of the
instrument. Since the SCPI protocol does not include pressure instruments, bit 10 of both
these registers are used as a pressure summary bit. This pressure summary bit is expanded
to two, 16 bit registers (Bit 15 is not used and is always zero).
The only bit implemented in the Operation status register is bit 10 (summary of the pressure
operation status).
A summary bit is the final output of a data structure, it is a single bit that shows the status of
one or more related events in the instrument. The basic structure of a summary bit
•
Condition register
•
Event register
•
Enable register
•
Logical ANDing of the Event and Enable registers
•
Summary bit that summarises the result using OR logic
Condition Register
This register shows the current status of the device. The condition register is constantly
updated - the bits in the register are set or reset showing the current condition.
Event Register
The event register shows an event that occurs in the condition register (a condition bit goes
from low to high). This condition change is stored and only reset when the event register is
read or the *CLS command sent.
Enable Register
This register allows the results of the event register to pass through to the next cascaded
register and enables the user to select the event that should generate the final SRQ event.
