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Revision A
Model 340 Telemetry System
4-5
2006920-001
Theory of Operation: Transmitter Board (No. 2003708-001)
Control Circuitry
Mode information, along with battery status and remote mark data, is
transmitted to the receiving unit by use of individual low-frequency
tones. These tones are generated by counters contained within the CPLD
and are a division of the main clock. Each tones is gated on or off
dependent on the state of the mode or function it represents The tones
are summarized as follows: ultrasound mode is 10 Hz; FECG is 20 Hz;
remote mark is 40 Hz; and battery low is 80 Hz. The gated tones from the
CPLD each connect to individual R/C low-pass filters that are then
combined in a summing amplifier with a roll-off of 8 Hz. The summing
gain from each R/C filter is selected to compensate for the attenuation
caused by the low roll-off frequency of this stage. This configuration
effectively provides two stages of low-pass filtering at each frequency.
The output of the summing amplifier connects to a third-order, unity-
gain, active low-pass filter with a cutoff frequency of 90 Hz. This filtered
output, along with the other analog signals, is combined to form the
composite modulation sent to the transmitter module. Mode status for
the patient parameters comes from the individual transducer connectors
via a grounding jumper. The remote mark signal is a switch contact that
is time extended by a comparator with a R/C delay. Low battery is
derived from a comparator that evaluates the raw battery voltage
against a fixed voltage reference. Mode information at the receiver is also
determined by the presence or absence of the two VCO signals. Control of
the VCO enables is accomplished through logic in the CPLD based on the
transducer in use. Level translation for the enable are done by rail-to-
rail op-amps configured as comparators.
There are two states for the low-battery condition. The first indicates
that there is approximately 10 minutes of operating time left in the
batteries. The second state is entered when the battery voltage is only
0.1 V above the minimum required for the power supply regulators to
operate. Both states are determined by comparators from the raw
battery voltage and a fixed voltage reference. When the first low-battery
comparator is activated, the CPLD will gate on the 80 Hz tone to signal
the receiver of the condition as well as activate an audio alarm locally.
The audio alarm is a gated 4.5 kHz tone that drives a piezo speaker. The
gate time is 0.2 s on every 1.6 s. The tone and gate times are a division of
the main clock. When the second comparator is activated, the CPLD
disables all operating modes and the transmitter module (transmitter is
turned off). Additionally, the audio alarm is altered to a 50% duty cycle
with a 0.8 s period. This state is latched. Operation of the unit cannot be
restored until power is cycled off and on. The system will also be disabled
when the unit is operated below +5
°
C. A temperature sensor in the
CPLD will disable the modes and transmitter module when the
temperature falls below this threshold. This state is not latched. Normal
operation will be restored automatically when the unit returns to the
specified operating temperature range.
Содержание Corometrics 340
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