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Chapter 4 Communication
DMC-1000
It is a good idea to clear any control data before attempting this procedure. Send a no-op instruction,
by reading N+1 address, before you start. All data, including data from the DMC-1000, will then be
cleared.
Clearing the FIFO is useful for emergency resets or Abort. For example, to Reset the controller, clear
the FIFO, then send the RS command.
Interrupts
The DMC-1000 provides a hardware interrupt line that will, when enabled, interrupt the PC.
Interrupts free the host from having to poll for the occurrence of certain events such as motion
complete or excess position error.
The DMC-1000 uses only one of the PC's interrupts, however, it is possible to interrupt on multiple
conditions. The controller provides a register that contains a byte designating each condition.
The user can also send an interrupt with the UI command.
Configuring Interrupts
To use the DMC-1000 interrupt, you must complete the following four steps:
1. Place a jumper on the desired IRQ line. The DMC-1000 board must
contain only one jumper to designate the interrupt line for the PC bus.
The available lines are IRQ2, IRQ3, IRQ4, IRQ5, IRQ7, IRQ9, IRQ10,
IRQ11, IRQ12, IRQ14, IRQ15. Note that the jumper for IRQ2 and
IRQ9 is at the same location. IRQ9 is used for computers wired for the
AT standard and IRQ2 is used for computers wired for the XT
standard. If you aren't sure, select another interrupt line instead.
Please note that only one card can be attached to each interrupt request
line.
2. Your host software code must contain an interrupt service routine and
must initialize the interrupt vector table in the PC. The interrupt vector
table and an example interrupt service routine, INIT_1000.C (included
in Galil's COMMDISK) is shown in Appendix 12.8. Failure to have
proper interrupt servicing in your host program could cause disastrous
results including resetting or "hanging" your computer.
3. The DMC-1000 interrupt hardware must be initialized following each
reset. This is done by writing the data 2 followed by 4 to the control
register at address N+1.
4. The Interrupt conditions must be enabled with the EI instruction. (The
UI instruction does not require EI). The EI instruction has the
following format:
EI M,N where
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