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CHAPTER 19 UART0, UART1
19.9.2
Flag Set Timings for a Receive Operation (in Mode 2)
The RDRF flag is set when the final stop bit is detected and reception transfer ends with
the last data bit (D8) having the value "1".
The ORFE flag is set when the final stop bit is detected, irrespective of the value of the
last data bit (D8). The data in UIDR is invalid when the ORFE bit is active.
The interrupt request to the CPU is generated when either of the flags are set (see
Section "19.10 UART0, UART1 Application Example" for details on using mode 2).
■
Flag Set Timings for a Receive Operation (in Mode 2)
Figure 19.9-4 RDRF Set Timing (Mode 2)
Figure 19.9-5 ORFE Set Timing (Mode 2)
Stop
(Stop)
RDRF
D6
D7
D8
Data
Receive interrupt
Stop
RDRF = 1
ORFE
Stop
RDRF = 0
ORFE
D7
D8
D7
D8
Data
Data
Receive interrupt
Receive interrupt
(Overrun error)
(Framing error)
Содержание MB90390 Series
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Страница 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
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Страница 132: ...104 CHAPTER 5 CLOCKS ...
Страница 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Страница 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Страница 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Страница 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Страница 274: ...246 CHAPTER 15 WATCH TIMER ...
Страница 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Страница 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Страница 364: ...336 CHAPTER 19 UART0 UART1 ...
Страница 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Страница 432: ...404 CHAPTER 20 UART2 UART3 ...
Страница 482: ...454 CHAPTER 22 SERIAL I O ...
Страница 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Страница 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Страница 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Страница 722: ...694 APPENDIX ...
Страница 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
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