Fujitsu MB90390 Series, Руководство по оборудованию

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CHAPTER 19 UART0, UART1
■
CLK Asynchronous Baud Rate
The six URD register bits: BCH, BCH0 and RC3, RC2, RC1, RC0 select the baud rate for CLK
asynchronous transfer.
First select the machine clock divider ratio using BCH and BCH0.
Then, set the asynchronous transfer clock division ratio for the clock selected above in RC3, RC2, RC1,
and RC0. The following settings are available.
The above 12 baud rates can be selected. The following formula shows how to calculate the CLK
synchronous baud rate.
where
φ
is a machine cycle and m is in decimal notation for RC3 to RC1.
Note:
The above formula for m=0 or m=1 cannot be calculated.
Data transfer is possible if the CLK asynchronous baud rate is in the range -1% to +1%. The baud
rate is the CLK synchronous baud rate divided by 8
×
13, 8
×
12, or 8.
Table 19.5-1 shows examples for 24 MHz, 20 MHz, 16 MHz, and 12 MHz machine cycles. However,
do not use the settings marked as "_" in the table.
BCH BCH0
0 0 --> Divide by 6 [For example, at 24 MHz: 24/6 = 4 MHz]
0 1 --> Divide by 4 [For example, at 16 MHz: 16/4 = 4 MHz]
1 0 --> Divide by 3 [For example, at 12 MHz: 12/3 = 4 MHz]
1 1 --> Divide by 5 [For example, at 10 MHz: 10/5 = 2 MHz]
Ba u d rate =
Ba u d rate =
Ba u d rate =
/4
2
m-1
/3
2
m-1
/5
2
m-1
[ b ps] (machine cycle = 16 MHz)
[ b ps] (machine cycle = 12 MHz)
[ b ps] (machine cycle = 20 (10) MHz)
Ba u d rate =
/6
2
m-1
[ b ps] (machine cycle = 24 MHz)
Ba u d rate =
Ba u d rate =
Ba u d rate =
/4
2
m-1
/3
2
m-1
/5
2
m-1
[ b ps] (machine cycle = 16 MHz)
[ b ps] (machine cycle = 12 MHz)
[ b ps] (machine cycle = 20 (10) MHz)
Ba u d rate =
/6
2
m-1
[ b ps] (machine cycle = 24 MHz)