Fujitsu MB86291 Scarlet, Часто задаваемые вопросы

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Q24: back to top
DCLKO Jitter @ Scarlet
1. If the Clock comes from the internal PLL
Although it depends on stability of supplied power for PLL, reference values are as follow.
Cremson/Scarlet -150ps to +180ps
2. If the Clock is given via DCLKI
If DCLKI does not include jitter, DCLKO does not include jitter also.
These specs assume that ideal input clock is given.
Q25: back to top
bank interleave
Use bank interleave
(mapping the each layer to allocate the different bank)
If you use two pcs of x16bit, 4bank, 64Mbits SDRAM
(total 16MByte graphics memory), the banks are mapped like the below.
0x00000000-0x001fffff:bank 0
0x00200000-0x003fffff:bank 1
0x00400000-0x005fffff:bank 2
0x00600000-0x007fffff:bank 3
Then if you map each layer as the below, it is "the bank interleave".
0x00000000-0x001fffff:bank 0 => B-layer
0x00200000-0x003fffff:bank 1 => M-layer
0x00400000-0x005fffff:bank 2 => W-layer
0x00600000-0x007fffff:bank 3 => C-Layer
Q26: back to top
Enable interrupts, IMASK register
There description in the hardware manual is wrong
Correct is IMASK:
1:Not mask
0:mask
Set the bit to 1 to enable the according interrupt.
By calling the function “GdcGeoSetInterruptMask” the parameter is set to the IMASK register.
e.g. enable command interrupt
GdcGeoSetInterruptMask (0x2);