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Cremson Starterkit User Manual
Chapter 6 CPU Board Hardware
The evaluation board provides various IO-signals, which can be connected to external
devices. The controller resource functions are available on the connectors JH1
(Peripheral_1) and JH2 (Peripheral_2).
The graphic subboards can be connected via the address/data bus connectors on the richt
side JDH1 and JDH2. For more information please refer to the following pin assignments
and the schematics in the appendix.
6.1 Overview
of
Jumpers
Jumper
Description
Standard Setting
Æ
Jumper Position
JP7
UART1_RxD
Choose RxD of synchron
or asynchron UART1
2-3
JP8
UART1_TxD
Choose TxD of synchron
or asynchron UART1
2-3
JP9
UART1_Clock
Clock-Select for UART1 in
syncronous mode
2-3
JP10
Flash_enable
Enable Flash on CS2 or
CS3
1-2
JP11
FR_3V3
3,3 Volts CPU-net
Closed
JP12
FR_5V0
5,0 Volts CPU-net
Closed
JP13 Vcc3/C
Bypass-Condensator
on/off
Closed
JP14 HVdd
5,0
Volts
of high current
outputs
Closed
JP15
Avcc
5,0 Volts of analog net
(ADC and DAC)
Closed
JP16 HSTX
Hardware-Standby
1-2
JP17
SELCLK
Clock-Source (4Mhz /
32kHz)
2-3
JP18 4MHz
4MHz-Oszillator
1-2
JP19 32kHz
32kHz-Oszillator
2-3
JP20 VCI
Filter
for
32kHz-Oscillator 2-3
JP21
UART0_TxD
MAX232 TxD to UART0
Closed
JP22
UART0_RxD
MAX232 RxD to UART0
Closed
JP23
CAN0_TX
PCA82C250 TxD to CAN0 Open
JP24
CAN0_RX
PCA82C250 RxD to CAN0 Open
JP25
LEDs
Enable LEDs
Closed
Table 1: Configuration jumpers on CPU-board
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