Nexus3/ Module
e200z3 Power Architecture Core Reference Manual, Rev. 2
10-22
Freescale Semiconductor
NOTE
DTSA must be less than DTEA to guarantee correct data write/read traces.
Data trace ranges are inclusive of the DTSA and DTEA addresses for range
control settings indicating within range, and are exclusive of the DTSA and
DTEA addresses or range control settings indicating outside of range.
10.5
Nexus3/ Register Access Through JTAG/OnCE
Access to Nexus3/ register resources is enabled by loading a single instruction, NEXUS3-Access,
into the JTAG instruction register/OnCE OCMD register. For the Nexus3/ block, the OCMD
value is 0b00_0111_1100.
Once the NEXUS3-Access instruction has been loaded, the JTAG/OnCE port allows tool/target
communications with all Nexus3/ registers according to the register map in
Reading/writing of a Nexus3/ register then requires two passes through the data-scan path of the
JTAG state machine 12 (see
Section 10.15, “IEEE 1149.1 (JTAG) RD/WR Sequences”
).
1. The first pass through the DR selects the Nexus3/ register to be accessed by providing an
index (see
), and the direction, read/write. This is achieved by loading an 8-bit value into
the JTAG data register (DR). This register has the format shown in
.
Table 10-19. Data Trace—Address Range Options
Programmed Values
Range Control Bit Value
Range Selected
DTSA < DTEA
0
The address range lies between the values specified
by DTSA and DTEA. (DTSA -> <- DTEA)
1
The address range lies outside the values specified by
DTSA and DTEA. (<-DTSA DTEA->)
DTSA > DTEA
N/A
Invalid range–No trace
DTSA = DTEA
N/A
Invalid range–No trace
(7 bits)
(1 bit)
Nexus Register Index
R/W
Reset Value: 0x00
Figure 10-15. Nexus3/ Register Access through JTAG/OnCE (Example)
Table 10-20. Nexus Register Example
Field
Description
Nexus Register Index
Read/write (R/W)
0 Read
1 Write
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