Fluke NetDAQ 2640A, Руководство по обслуживанию

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Theory of Operation
Detailed Circuit Description
2
2-39
A3U20 is also a dual op-amp. One half provides the regulated 3 mA required to flow
into the cathode of the zener diode within A3Q5 by forming a current source with A3Q4.
If not supplied from a current source, the current would change with the emitter base
voltage of A3Q5. The current source is best visualized as a differential amp sensing both
sides of A3R83 and nulling this against the reference voltage. The other side of A3Q20
establishes a reference voltage of 0.493V dc above the collector of A3Q5 so that the
selected resistors A3R64 and A3R65 provide the required current. When A3Q5 is tested,
it has a collector current specified for zero tc. This current is converted into resistor
values, but requires a known voltage differential to operate properly.
Analog/Digital Converter Circuit 2-67.
The A/D converter consists of a gate array for control, switches for directing currents,
and a reference circuit and reference resistors for providing the currents. The various
currents are integrated across capacitor A3C44, and the zero crossing is detected by
comparator A3U11 and a logic signal returned to the FPGA (Field Programmable Gate
Array). The FPGA contains counters that count the amount of time that the reference
currents are applied to the integrator. The input voltage is proportional to the difference
in the time required of positive and negative reference currents to null the applied input.
The a/d produces about +35,000 counts for +3V dc. It has linear behavior up to 3.4V dc.
This gives a resolution of about 88
µ
V in the fast measurement mode.
The measurement cycle consists of four basic periods as shown in Table 2-11. This gives
a total measurement time of 833.533
µ
s. A brief explanation of each state follows. For
additional information, refer to “A1 Main to A3 A/D Converter Communications” later
in this chapter.
Table 2-11. Analog/Digital Converter Measurement Cycle
State Counts Time
Autozero 125 200.0
µ
s
Integrate 307 491.4
µ
s
Deintegrate1 64 102.4
µ
s
Deintegrate2 24 38.4
µ
s
Overhead n/a 1.333
µ
s
Total 833.533
µ
s
Autozero 2-68.
Autozero is the state the a/d idles in when not in use. In this state, the signals PREF,
NREF, DREF, and INT are all low. The purpose of the state is to remove any remaining
charge on A3C44, to charge A3C60 to a voltage so that pin 6 of A3U19 is at zero, and to
provide time to return data to the microprocessor. In this state, the input is not
connected, A3R94 and A3R95 ground the input, A3U19 produces an error signal, which
is amplified by the other halve of A3U19, providing feedback to produce a nulling
voltage at A3C60. A3C60 stays charged to this voltage until another cycle is initiated.