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Rev AN-2153 REV B 
  

©2016 Finisar Corporation AN-2153 REV B 

Page 5 of 6 

20-May-2016 
 

Appendix 

 
The IEEE802.3bm D3p3 Annex 83E defines the chip to module CAUI-4 electrical interface. 
The CAUI-4 chip to module channel insertion loss is specified to be up to 10 dB at the fundamental 
frequency of 12.89 GHz.  
 
This allocates 7.3 dB loss for the host, 1.5 dB insertion loss for the module, and up to 1.2 dB electrical 
connector insertion loss. 

The CTLE function defined in section 83E.3.1.6.1 corrects for the unwanted channel loss, present in the 
host system. This distortion increases with frequency and length of the high speed interface.  

The equalizer gain function is given by the following function : 

𝐻(𝑓) =   

𝐺𝑃1𝑃2

𝑍1

×

 

𝑗2𝜋𝑓+𝑍1

(𝑗2𝜋𝑓+𝑃1)(𝑗2𝜋𝑓+𝑃2)

 

 

Where 

𝐻(𝑓)

 is the CTLE transfer function 

G

 is the CTLE gain 

𝑃1, 𝑃2

 are the CTLE poles in Grad/s 

𝑍1 

is the CTLE zero in Grad/s 

𝑗  

is the square root of -1 

𝑓

 is the frequency in GHz 

 
The graph below represents this function. CTLE gain refers to the relative amount of gain peaking at 
12.89 GHz compared to low frequency  required to compensate the channel loss over frequency.  For 
example a system that has a short trace length will require a smaller gain setting to correct for the channel 
imperfections eg 1 dB, whereas a host board that implements a longer trace length between host ASIC to 
module might require up to  9 dB of amplitude.  
 

 

Finisar QSFP28 transceivers are characterized for CTLE, from IEEE802.3bm D3p3 Figure 83E-9.  

Содержание QSFP28 LR4

Страница 1: ...ansmit CDR clock and data recovery Equalization is a signal processing technique that boosts the high frequency component of the signal and reduces ISI This function is called CTLE Continuous Time Linear Equalization and is implemented at the CDR on all 4 input lanes Finisar s QSFP28 modules have fixed programmable CTLE implementation For more details on the CTLE function please refer to the Appen...

Страница 2: ... support for auto adaptive equalizer set to 0 for unsupported SFF 8636 Table 6 22 Page 0h register 193 bit 2 indicates Manual i e fixed programmable equalizer support set to 1 for supported The magnitude of the transmitter input equalization supported by the transceiver is identified in Page 03h Byte 224 Here the maximum gain supported is 10dB for fixed programmable mode The SFF 8636 Table 6 34 de...

Страница 3: ...ny non default register value will need to be written upon each module power cycle or reset Initialization Process in fixed programmable CTLE mode In manual CTLE mode we recommend that the host follow the initialization sequence described below 1 Host board is powered on and initialized The QSFP28 module may or may not already be plugged into the host board Host should implement low power mode LPM...

Страница 4: ...isable the module goes to high power state Both QSFP28 LR4 and CWDM4 are configured as cooled devices so the module ready time including TEC stabilization time is a maximum of 5 seconds 9 Once the optical connections are implemented the host physical layer link indicator should be asserted 10 Host will need to read Page 0 byte 2 to clear the latched interrupt state Interrupt pin 28 will go to high...

Страница 5: ...ace The equalizer gain function is given by the following function 𝐻 𝑓 𝐺𝑃1𝑃2 𝑍1 𝑗2𝜋𝑓 𝑍1 𝑗2𝜋𝑓 𝑃1 𝑗2𝜋𝑓 𝑃2 Where 𝐻 𝑓 is the CTLE transfer function G is the CTLE gain 𝑃1 𝑃2 are the CTLE poles in Grad s 𝑍1 is the CTLE zero in Grad s 𝑗 is the square root of 1 𝑓 is the frequency in GHz The graph below represents this function CTLE gain refers to the relative amount of gain peaking at 12 89 GHz compared t...

Страница 6: ... REV B 2016 Finisar Corporation AN 2153 REV B Page 6 of 6 20 May 2016 Finisar Contact Information Finisar Corporation 1389 Moffett Park Drive Sunnyvale CA 94089 1134 408 548 1000 www finisar com sales finisar com ...

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