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FIBOCOM SU806 Series Hardware Guide
Page 49 of 91
Pin Name
Pin
Number
I/O
4-Lane+2-Lane+1-Lane
Note
MIPI_CSI1_LN0_P
66
AI
MIPI front camera serial interface lane 0 -
-
MIPI_CSI1_LN1_N
67
AI
MIPI front camera serial interface lane 1 +
-
MIPI_CSI1_LN1_P
68
AI
MIPI front camera serial interface lane 1 -
-
SCAM_MCLK
75
DO Front camera master clock
-
SCAM_RST
81
DO Front camera reset
-
SCAM_PWDN
82
DO Front camera power down
-
MIPI_CSI1_LN3_N
70
AI
MIPI depth camera serial interface clock -
-
MIPI_CSI1_LN3_P
71
AI
MIPI depth camera serial interface clock +
-
MIPI_CSI1_LN2_N
72
AI
MIPI depth camera serial interface lane 0 -
-
MIPI_CSI1_LN2_P
73
AI
MIPI depth camera serial interface lane 0 +
-
DCAM_MCLK
238
DO Depth camera master clock
-
DCAM_RST
237
DO Depth camera reset
-
DCAM_PWDN
236
DO Depth camera power down
-
CAM_I2C_SCL1
239
DO Front/depth camera I2C clock
-
CAM_I2C_SDA1
240
I/O Front/depth camera I2C data
-
3.17.1 Rear Camera
Reference design of rear camera is shown as follows: