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FIBOCOM FG621-LA Series Hardware Guide
Page 22 of 57
Figure 4-1 Recommended power design
Power filter capacitor design is shown in the following table:
Table 4-2 Filter capacitors design of power supply
Recommended
Capacitor
Application
Description
220uF x 2
Regulating capacitor
Reduce power fluctuations during module
operation, low ESR Capacitor is required, and
the total capacitance should not be less than
440uF. The current driving capacity of VBAT
must be not less than 2.0A.
1uF,100nF
Digital signal noise
Filter clock and digital signal interference
33pF
850MHz/900 MHz bands
Filter low band RF interference
8.2pF
1800/1900/2100/2300/2500/2600
MHz bands
Filter middle/high band RF interference
The power stability can ensure the normal operation of FG621-LA series module. Special attention
requires when designing circuit that the power supply ripple limit for the module is no more than 300mV
(the circuit ESR < 100mΩ). When the module is operating in maximum power consumption, the power
voltage needs to be at least 3.4V. Otherwise, the module may power off or restart. When the module is
operating in Burst transmit state, the power limit is shown in Figure 4-2:
