Feig Electronic ID ISC.MR102, Руководство пользователя

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Identification Manual ID ISC.MR102
FEIG ELECTRONIC GmbH Page 122 of 153 H01113-4e-ID-B.docx
8.3.8. NXP (I-Code SLI-S)
Chip ID: 2h = 00000010b (Bit 47 - 40 of UID)
Memory organization: 40 x 4 Byte = 1280Bit
Number of blocks 40 (user area: 0
– 39)
Number of pages 10 (user area: 0
– 9)
Block size 4 byte Page size 16 byte = 4 Blocks
WR-OPTION
*
0
WR-OPTION
*
0
Command
Code
Function Mode Comment
non-
addressed
addressed select
0x01 Inventory

- - -
0x02 Stay Quiet

-

-
0x22 Lock Multiple Blocks
   
0x23 Read Multiple Blocks


**
 
Single Read
0x24 Write Multiple Blocks
   
0x25 Select

-

-
0x26 Reset to Ready
   
0x27 Write AFI
   
0x28 Lock AFI
   
0x29 Write DSFID
   
0x2A Lock DSFID
   
0x2B Get System Information
   
0x2C Get Multiple Block Security
Status
- - - -

The WR-OPTION will be set automatically by the FEIG Readers if the WR-OPTION pa-
rameter in “CFG4 Transponder Parameters” is set to “00: automatically set”.
**
Reading of more than one block in non addressed mode is only possible, if parameter “Read Mode” in CFG4
is set to “01: Single Read“.