AIM104-COM8 Technical Manual
Appendix C – Notes on using the 16C550 UART
© 2007 Eurotech Ltd Issue C
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Appendix C – Notes on using the 16C550 UART
Enabling the interrupt outputs
If you intend to write your own low level UART handler, remember that in order for the
UART channel on the AIM104-COM8 to generate interrupts to the host CPU, you must
enable the IRQ output from the UART by setting bit 3 in the Modem Control Register
(MCR).
Standard driver software does this as part of the port initialisation, so no action is
necessary if you are using Eurotech Ltd’s example software or that of a third party
vendor.
The receiver FIFO trigger point and timeout
The 16C550 has sixteen byte FIFO’s for both its transmit buffer and receive buffer. This
can enhance the performance of the serial ports and reduce the interrupt rate to the
main processor. However, it is necessary to set up the receive trigger point optically for
your application.
With the FIFO enabled, any character received is added to the 16 byte receive FIFO.
This has four programmable trigger points as shown in the following diagram:
Once the FIFO has received sufficient characters to reach the FIFO trigger point, an
interrupt is generated that is serviced in order to remove all the characters from the
FIFO.
If the FIFO trigger point is set to a value other than 1, a situation may arise where the
input data stream stops adding characters to the FIFO before the trigger point is
reached. For example, the trigger may be set at eight when only six characters has
been received. In this situation the UART generates an IRQ after a specific timeout
period from the end of the last character received.
