Connector Assignments
7.4.3 PMC P4 I/O Connector
Pin
Signal Name
Notes
Alternative Signal Name
Notes
Differential Pair
(XILINX Name)
Notes
1
FPGA-IO<0>
3.3V or 2.5V, IO
LVDS_B35_4_N
2
FPGA-IO<1>
3.3V or 2.5V, IO
LVDS_B35_12_N
CLK Input
3
FPGA-IO<2>
3.3V or 2.5V, IO
LVDS_B35_4_P
4
FPGA-IO<3>
3.3V or 2.5V, IO
LVDS_B35_12_P
CLK Input
5
FPGA-IO<4>
3.3V or 2.5V, IO
LVDS_B35_8_N
6
FPGA-IO<5>
3.3V or 2.5V, IO
LVDS_B35_17_N
7
FPGA-IO<6>
3.3V or 2.5V, IO
LVDS_B35_8_P
8
FPGA-IO<7>
3.3V or 2.5V, IO
LVDS_B35_17_P
9
FPGA-IO<8>
3.3V or 2.5V, IO
LVDS_B35_9_N
10
FPGA-IO<9>
3.3V or 2.5V, IO
LVDS_B35_13_N
CLK Input
11
FPGA-IO<10>
3.3V or 2.5V, IO
LVDS_B35_9_P
12
FPGA-IO<11>
3.3V or 2.5V, IO
LVDS_B35_13_P
CLK Input
13
FPGA-IO<12>
3.3V or 2.5V, IO
LVDS_B35_18_N
14
FPGA-IO<13>
3.3V or 2.5V, IO
LVDS_B35_23_N
15
FPGA-IO<14>
3.3V or 2.5V, IO
LVDS_B35_18_P
16
FPGA-IO<15>
3.3V or 2.5V, IO
LVDS_B35_23_P
17
FPGA-IO<16>
3.3V or 2.5V, IO
LVDS_B35_19_N
18
FPGA-IO<17>
3.3V or 2.5V, IO
LVDS_B35_21_N
19
FPGA-IO<18>
3.3V or 2.5V, IO
LVDS_B35_19_P
20
FPGA-IO<19>
3.3V or 2.5V, IO
LVDS_B35_21_P
21
FPGA-IO<20>
3.3V or 2.5V, IO
LVDS_B34_17_N
22
FPGA-IO<21>
3.3V or 2.5V, IO
LVDS_B34_13_N
CLK Input
23
FPGA-IO<22>
3.3V or 2.5V, IO
LVDS_B34_17_P
24
FPGA-IO<23>
3.3V or 2.5V, IO
LVDS_B34_13_P
CLK Input
25
FPGA-IO<24>
3.3V or 2.5V, IO
LVDS_B34_14_N
CLK Input
26
FPGA-IO<25>
3.3V or 2.5V, IO
LVDS_B34_6_N
27
FPGA-IO<26>
3.3V or 2.5V, IO
LVDS_B34_14_P
CLK Input
28
FPGA-IO<27>
3.3V or 2.5V, IO
LVDS_B34_6_P
29
FPGA-IO<28>
3.3V or 2.5V, IO
LVDS_B34_16_N
30
FPGA-IO<29>
3.3V or 2.5V, IO
LVDS_B34_15_N
31
FPGA-IO<30>
3.3V or 2.5V, IO
LVDS_B34_16_P
32
FPGA-IO<31>
3.3V or 2.5V, IO
LVDS_B34_15_P
XMC-CPU/T10
Hardware Manual • Doc. No.: V.2030.21 / Rev. 1.2
Page 29 of 41
