ERM HR C6000, Руководство пользователя

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received data. This interrupt is typically tested in bit error rate or other performance in physical
layer mode.
The system interrupt is handled as follows. The specific response tree is shown below (the FM
mode is not included):
Waiting for interruption
Received a system outage
Read 0x82
Send
request
rejection
Send start End of
sending
Post access Receive
data
Receive
informatio
n
Abnormal
exit
Physical
layer alone
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Interrupt
Bit0
Read 0x84
to get 7
kinds of
content
Read 0x86
to get 6
kinds of
end
content
Read 0x51
to get the
status of
received
data
Read 0x90
to get the
receiving
result
Write 0x83 corresponding bit clear interrupt
Waiting for interruption
OMISSIS
Figure 5.2 Interrupt Response Tree
The Time_slot_inte interrupt is a TDMA time slot interrupt. When the synchronization time slot of
HR_C6000 is established, the interrupt is continuously given at intervals of 30ms. Until the
synchronization is lost.
5.2 Interface read and write instructions
The user accesses through the general U_SPI includes the register system parameter table, register
schedule, TX side 1.2KRAM and RX end 1.2KRAM. The access frame format is:
Cmd Addr Data0 Data1... Datan
OMISSIS
Figure 5.3 U_SPI Access Frame Format
Table 5.1 Cmd indicates the read and write status of the SPI port and the corresponding address
space.
Cmd W IsRead Bit7 1 means the operation is read, 0 means the
operation is write
Read and write initial
address extension Bit6 0 does not expand, 1 expands