Equinox Systems ISPnano I Series, Руководство пользователя

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Distributor of Equinox Technologies: Excellent Integrated System Limited
Datasheet of ISPNANO S3 KIT - ISP PORTABLE PROGRAMMER
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
ISPnano Series Programmer - User Manual – V1.11 – 12
th
May 2011 9
1.5.4 Programmer Target I/O Capability
Target I/O Capability Series I Series II Series III Series III
ATE
Programmable Target
I/O
5 x I/O
1 x O
5 x I/O
1 x O
5 x I/O
1 x O
5 x I/O
1 x O
I/O Voltage Range
1.8 – 5.0V 1.8 – 5.0V 1.8 – 5.0V 1.8 – 5.0V
I/O Isolation
- -
-
Galvanic Relay
isolation per I/O
signal, power & 0V
ESD protection on
Target I/O lines
IEC61000-4-2, air
discharge: 15 kV
IEC61000-4-2,
contact discharge:
8kV
IEC61000-4-2, air
discharge: 15 kV
IEC61000-4-2,
contact discharge:
8kV
IEC61000-4-2, air
discharge: 15 kV
IEC61000-4-2,
contact discharge:
8kV
IEC61000-4-2, air
discharge: 15 kV
IEC61000-4-2,
contact discharge:
8kV
Over-voltage
protection on Target
I/O lines
YES
Voltages over 9V are
clamped.
YES
Voltages over 9V
are clamped.
YES
Voltages over 9V
are clamped.
YES
Voltages over 9V
are clamped.
1.5.5 Supported programming interfaces
Programming
Interface Series I Series II Series III Series III
ATE
SPI Port
Yes - multiplexed Yes - multiplexed Yes - multiplexed Yes - multiplexed
JTAG Port
Yes - multiplexed Yes - multiplexed Yes - multiplexed Yes - multiplexed
I2C Port
Yes - Dedicated Yes - Dedicated Yes – multiplexed
with PDI port
Yes – multiplexed
with PDI port
UART Port
Yes - multiplexed Yes - multiplexed Yes - multiplexed Yes - multiplexed
XMEGA PDI Port
-
-
Yes – multiplexed
with I2C port
Yes – multiplexed
with I2C port
ATtiny TPI Port (LV)
-
-
Yes – multiplexed
with I2C port
Yes – multiplexed
with I2C port
ATtiny TPI Port (HV)
-
-
Yes – multiplexed
with I2C port.
+12V VPP on
RESET pin
Yes – multiplexed
with I2C port.
+12V VPP on
RESET pin
Programmable clock
output
Yes
32 kHz
Yes
32 kHz
Yes
32 kHz
Yes
32 kHz
Please note:
•
The ‘SPI Port’, ‘JTAG Port’ and ‘UART’ port signals all share the same physical programmer
I/O lines.
•
This means that the programmer can only be connected via one of these programming
interfaces at any one time.
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