Epson S1C63666, Техническое руководство

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EPSON
S1C63666 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Analog Comparator)
4.16 Analog Comparator
4.16.1 Configuration of analog comparator
The S1C63666 has a built-in MOS input analog comparator. Two differential input terminals (inverted
input terminal CMPM0 and non-inverted input terminal CMPP0) are provided for the analog comparator.
Figure 4.16.1.1 shows the configuration of the analog comparator.
Data bus
CMPDT
V
DD
V
SS
CMPP0
CMPM0
+
–
CMPON
Latch
Fig. 4.16.1.1 Configuration of analog comparator
4.16.2 Analog comparator operation
By writing "1" to the analog comparator control register CMPON, the analog comparator goes on and
starts comparing the external voltages input to the two differential input terminals CMPP0 and CMPM0.
The result can be read from the comparator comparison result detection bit CMPDT through the latch and
when CMPP0 (+) > CMPM0 (-), it is "1" and when CMPP0 (+) < CMPM0 (-), it is "0". After the analog
comparator is turned on, a maximum of 3 msec is necessary until the output stabilizes. Consequently,
allow an adequate waiting time after turning the analog comparator on, before reading the comparison
result.
When the analog comparator is turned off, the comparison result at that point will be latched and the
concerned data can be read thereafter, until the analog comparator is turned on.
Turn the analog comparator off when it is not necessary, so as to reduce current consumption.
Refer to Chapter 7, "Electrical Characteristics" for the input voltage range.