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14 8-BiT OSC1 TiMeR (T8OSC1)
14-4
Seiko epson Corporation
S1C17624/604/622/602/621 TeChniCal Manual
T8ORUN
T8ORST
T8OCMP[7:0]
Count clock
T8OCNT[7:0]
Reset
Reset and
compare match
interrupt
Reset and
compare match
interrupt
0
1
2
3
4
5
0
1
2
3
4
5
0
1
0x5
T8ORUN
T8ORST
T8OCMP[7:0]
Count clock
T8OCNT[7:0]
Reset
Reset and
compare match
interrupt
0
1
2
3
4
5
0
0x5
One-shot mode
Repeat mode
7.1 Basic Counter Operation Timing
Figure 14.
PWM Output
14.8
The T8OSC1 module can generate a PWM signal in accordance with the compare data and PWM duty data settings
and output it from the TOUT4 pin.
Output pin setting
To use the PWM output pin (TOUT4), the pin function of the corresponding port must be switched in advance.
See the “I/O Ports (P)” chapter for switching the pin function.
PWM waveform control
The PWM waveform cycle can be set by the compare data register (see Section 14.6) and the duty ratio can be
adjusted by the PWM duty data register. The timer outputs a low level signal until the counter value matches
the value of the PWM duty data register. When the counter value exceeds the value of the PWM duty data, the
output pin changes to high. Once the counter counts up to the compare data register value, the counter is reset
and the output pin returns to low. Figure 14.8.1 shows the output waveform.
Count clock
T8ORUN
Counter value
Duty match signal
Compare match signal
TOUT4 output
1 2 3 4 5 0
0
1 2 3 4 5 0 1 2 3
2 3
4 5 0 1
(when T8OSC1_DUTY = 3 and T8OSC1_CMP = 5)
8.1 PWM Output Waveform
Figure 14.
Precautions
(1) When using the timer output, set the following: PWM duty data
≥
0, compare data
≥
1. The minimum set-
ting value is 0 for PWM duty data and 1 for compare data. The timer output cycle is 1/2 of the count clock.
(2) When the PWM duty data is set greater than the compare data, only the compare match signal will be gen-
erated. No duty match signal will be generated. In that case, the TOUT4 output is fixed at low.