EDM01-36v10 DAG_9.2X2_Card_User_Guide - Synchronizing clock time
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©2010 - 2012 Endace Technology Ltd. Confidential - Version 10 - May 2012
Dagclock statistics reset
Statistics are reset to zero when the following occur:
•
Loading a DAG driver
•
Loading firmware
•
dagclock
with a
-x
option
•
dagclock
with a
set or
reset
command.
Example
To view the default
dagclock
configuration:
dagclock –dX
(Where X is the device number of the DAG card you want to configure).
The following is the output from DAG card that has its clock reference connected. The clock statistics
have been reset since the card was last synchronized.
Note:
Values differ for each DAG card type.
muxin rs422
muxout none
status Synchronised Threshold 596ns Failures 0 Resyncs 0
error Freq -30ppb Phase -60ns Worst Freq 75ppb Worst Phase 104ns
crystal Actual 100000028Hz Synthesized 67108864Hz
input Total 3765 Bad 0 Singles Missed 5 Longest Sequence Missed 1
start Thu Apr 28 13:32:45 2007
host Thu Apr 28 14:35:35 2007
dag Thu Apr 28 14:35:35 2007
Note:
For a description of the
dagclock
output see
Dagclock output explained
(page 57).