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USER MANUAL JetKit-3010 ELMA.COM
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3.2.2 PCI Express clock
The NVIDIA ® Xavier™ has two distinct PCI Express clocks for the PCI Express interfaces. There is
one PCI Express clock used as input and a separate PCI Express clock used as output.
The clock output signals PEX_CLK5_P/N of the NVIDIA
® Xavier™ are connected to the CompactPCI
Serial clock outputs 1/- in connector P5, pins A5/B5 (system slot pinout).
The clock input signals NVHS0_REFCLK_P/N are connected to the CompactPCI Serial clock input
P/- in connector P1, pins E4/F4 (peripheral slot pinout).
In contrast to those distinct clock signals, there is just a single CLKREQ# signal on the NVIDIA
®
Xavier™ (PEX_L5_CLKREQ_N). Depending on the direction of the clock signals used, the CLKREQ#
signal is used in the opposite direction to either request an incoming clock or detect a request for
an outgoing clock.
Both those CLKREQ# functionalities use different pins in the CompactPCI Serial slot. The CLKREQ#
input (1_PE_CLKE# for PCI Express clock signals 1/-) is located on connector P5 pin C5
(system slot pinout). The CLKREQ# output (PCIE_EN#) is located on connector P1, pin K2
(peripheral slot pinout).
On the peripheral slot pinout, connector P5 pin C5 is a GND pin. So the CLKREQ# input and output
pins should not be interconnected. Therefore, the desired direction can be configured on the board.
See Table 32 in chapter 4 for the DIP switch settings to select the CLKREQ# input/output pin
configuration.
3.2.3 PCI Express reset
The PCI Express link of the JetKit-3010 has a dedicated reset signal (PEX_L5_RST_N). Depending
on the operation mode of the PCI Express link, the direction of the signal is inverted. In PCI
Express root mode, the reset signal is an output to trigger the reset of the PCI Express nodes.
When in endpoint mode, the reset signal is an input to be triggered by the root complex.
The CompactPCI Serial architecture does not provide a separate PCI Express reset on the
connector pinout. Therefore, the reset signal is connected to the BMC, which allows propagation of
the PCI Express reset to the main reset output on the backplane, when the PCI Express reset is an
output of the NVIDIA
® Xavier™. When the PCI Express reset is an input (endpoint mode), the reset
input of the board can be used to trigger the PCI Express reset of the NVIDIA ® Xavier™.
This PCI Express reset configuration can be configured via “config” command in the BMC CLI (see
chapter 3.3.2).
3.3 Board Management Controller (BMC)
3.3.1 Overview
The BMC of the JetKit-3010 acts as the power management controller for the NVIDIA ® AGX
Xavier™ module. This module requires a certain power up sequence to run the module reliably,
which is implemented by the BMC. The BMC further needs to consider the CompactPCI Serial role
(system / peripheral board) as well as power control options.
Additionally, the BMC acts as voltage monitor and reset controller, which handles the reset input
and output signals from the CompactPCI Serial backplane, the main reset as well as the PCI
Express reset of the NVIDIA
® Xavier™.