E.F. Johnson 242-2008-332, Руководство пользователя

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CIRCUIT DESCRIPTION
6-5
September 1994
Part No. 001-2008-300
As previously stated, the counter divide numbers
are chosen so that when the VCO is operating on the
correct frequency, the VCO-derived input to the phase
detector (f
V
) is the same frequency as the TCXO-
derived input (f
R
).
The f
R
input is produced by dividing the 17.5
MHz TCXO frequency by 1400. This produces a ref-
erence frequency (f
R
) of 12.5 kHz. Since the VCO is
on frequency (receive frequency minus 52.95 MHz)
and no multiplication is used, the frequencies are
changed in 12.5 kHz steps and the reference frequency
is 12.5 kHz for all frequencies.
The f
V
input is produced by dividing the VCO
frequency using the prescaler and N counter in U209.
The prescaler divides by 64 or 65. The divide number
of the prescaler is controlled by the N and A counters
in U209.
The N and A counters function as follows: both
the N and A counters begin counting down from their
programmed number. When the A counter reaches
zero, it halts until the N counter reaches zero. Both
counters then reset and the cycle repeats. The A
counter is always programmed with a smaller number
than the N counter. While the A counter is counting
down, the prescaler divides by 65. Then when the A
counter is halted, the prescaler divides by 64.
Example: Assume a receive frequency of
813.4875 MHz (channel 300). Since the VCO is 52.95
MHz below the receive frequency it must be 760.5375
MHz for channel 300. To produce this frequency, the
N and A counters are programmed as follows:
N =
950 A = 43
NOTE: Section 8.2.5 describes how the N and A
counter numbers can be calculated for other channels.
To determine the overall divide number of the
prescaler and N counter, the number of VCO output
pulses required to produce one N counter output pulse
can be counted. In this example, the prescaler divides
by 65 for 65 x 43 or 2,795 input pulses. It then divides
by 64 for 64 x (950 - 43) or 58,048 input pulses. The
overall divide number K is therefore (58,048 + 2,795)
or 60,843. The VCO frequency of 760.5375 MHz
divided by 60,843 equals 12.5 kHz which is the f
R
input to the phase detector. The overall divide number
K can also be determined by the following formula:
K = 64N + A
Where,
N = N counter divide number and
A = A counter divide number.
6.1.13 LOCK DETECT
When the synthesizer is locked on frequency, the
Lock Detect on U209, pin 2 is a high voltage with very
narrow negative-going pulses. Then when the synthe-
sizer is unlocked, these pulses become much wider.
The lock detect pulses are applied to J201, pin 14
and sent to the RF Interface on J103, pin 14 for detec-
tion and sampling in the IAC.
6.2 EXCITER
6.2.1 VCO (A007)
The Voltage-Controlled Oscillator (VCO) is
formed by Q802, associated circuitry and a resonator
consisting of L204 in the Exciter. The screw in L204
in the Exciter tunes the tank circuit to the desired fre-
quency range. The VCO oscillates in a frequency
range from 851 MHz to 869 MHz. Biasing of Q802 is
provided by R805, R806 and R807. An AC voltage
divider formed by C812 and C813 initiates and main-
tains oscillation. C803 couples Q802 to the tank cir-
cuit.
The VCO frequency is controlled in part by DC
voltage across varactor diode CR802. As voltage
across a reverse-biased varactor diode increases, its
capacitance decreases. Therefore, VCO frequency
increases as the control voltage increases. The control
line is RF isolated from tank circuit by choke L804.
The amount of frequency change produced by CR802
is controlled by series capacitor C804.
The frequency is modulated in a similar manner.
The transmit audio/data signal is applied across varac-
tor diode CR801 to vary the VCO frequency at an
audio rate. C802 in series with CR801 determine the
amount of modulation produced by the audio signal.