
Dual Output Off-Line Non-isolated Flyback Power Solution
AP3917B 12V/20mA+3.8V20mA EV3 Board User
’s Guide
AP3917B EV3 Page 11 of 17 06-21-2019
Rev 1.0 www.diodes.com
CH1: Vds/Vak2; CH2: Vak1
Fig. 5-9, MOS drain-source 221
V@
85V/60Hz, full load
Fig. 5-10,
Vo1 terminal Vak 17
V, Vo2 Vak 57V@
85V/60Hz, full
load
Fig. 5-11, MOS drain-source 484
V @
265V/50Hz, full load
Fig. 5-12,Vo1 terminal Vak 129
V, Vo2 Vak 42V@
264V/50Hz,full
load
5.2.3 Output Ripple & Noise
The ripple and noise was tested at PCB terminal, using coaxial cable (1:1). The bandwidth was limited to 20MHz. A 10uF
electrolytic capacitor and a 104 ceramic capacitor should be paralleled to the output terminal.
Table 5-7, ripple & noise
Conditions
Input voltage
R&N(mV)
Figures
Vo1 terminal
Vo2 terminal
3.8V full load, 12V full load
85V/60Hz
96
184
Fig. 23
115V/50Hz
96
184
-
230V/50Hz
101
192
-
264V/60Hz
101
190
Fig. 24
CH1:Vo1 output; CH4:Vo2 output