Dini Group DN9002K10PCI, Руководство пользователя

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T H E R E F E R E N C E D E S I G N
utility, described in the section Compiling The Reference Design , can be used to generate new
bit files, or to generate bit files for less common configurations of the DN9002K10PCI.
The reference design was created using
Here are the default main.txt file lines.
FPGA A: fpga_a.bit
FPGA B: fpga_b.bit
clock frequency: G0 100Mhz
clock frequency: G1 200Mhz // DDR2 frequency
clock frequency: G2 300Mhz //LVDS test
1.2 Reference Design Types
“The Reference Design” in this chapter refers to the FPGA designs located on the user CD at
D:\FPGA_Reference_Designs\DN9002K10PCI\MainRef\
D:\FPGA_Reference_Designs\Programming_Files\DN9002K10PCI\MainTest\
Four other self-contained designs are on the CD and described in this manual. These four
designs are described in their own sections later in this chapter. The remaining sections describe
the “MainTest” design. “MainTest”, “The reference design” and “The Dini Group reference
design” are the same thing.
The four additional designs are
PCI Interface Design: Tests the 64-bit interface between FPGA A and the QL5064 (PCI)
LVDS Reference Design: Characterizes the FPGA interconnect using source-synchronous
Ethernet Reference Design: Tests the Ethernet PHY.
Other features of the board, such as memory sockets and daughtercard headers are tested using
the Main Test.
1.3 Using the reference design
Setting the clocks, what the clocks do.
How to run the tests in USB Controller.
DN9002K10PCI User Guide www.dinigroup.com 142