Elektra CPU User Manual V1.00
Page 68
OUTPUT
(TrimDAC
Address) NAME
FUNCTION
POLARITY
O0 ADCOFF
coarse
A/D offset, all modes,
coarse
The same for bipolar,
Inversed for unipolar
O1
ADCOFF fine
A/D offset, fine
The same for bipolar,
Inversed for unipolar
O2 ADCFUL
coarse
A/D full scale, all modes,
coarse Inversed
O3
ADCFUL fine
A/D full scale, fine
Inversed
O4
DACOFF coarse
D/A offset, coarse
Inversed
O5
DACOFF fine
D/A offset, fine
Inversed
O6
DACFUL coarse
D/A full scale, coarse
The same
O7
DACFUL fine
D/A full scale, fine
The same
Table 20: Trim-DAC (AD8801) Outputs
Notes:
•
“The same” means: increase in the trimDAC value increases readout and vice versa
•
“Inversed” means: increase in the trimDAC value decreases readout and vice versa
•
“Coarse” adjustment is the basic trimDAC variance, while “Fine” only affects adjustment of
about 1% of full effect in all modes
16.1 Analog Circuit Calibration Procedures
Calibration applies only to boards with the analog I/O circuitry.
The analog I/O circuit is calibrated during production test prior to shipment. Over time the circuit
may drift slightly. If calibration is desired, internal auto calibration can be performed using the
software routines provided with the Diamond Software driver libraries (part of the Elektra
development kit).
Six adjustments are possible:
♦
A/D bipolar offset
♦
A/D unipolar offset
♦
A/D
full-scale
♦
D/A bipolar offset
♦
D/A unipolar offset
♦
D/A
full-scale
The specific algorithms required to perform auto calibration can be quite involved, and are too
detailed to go into at great length here. Suffice it to say that such procedures are provided in the
included drivers and that details of auto calibration can be provided as necessary.
Note that the Auto calibration settings are stored in nonvolatile memory in the calibration
EEPROM and are reloaded each time the on-board FPGA (or system) is reset.
