Denon DVD-2910, Руководство по обслуживанию, Страница: 33 / 131

33
DVD-2910/955
92 AD1 I A ADC AD1 Input.
93 AD2 I A ADC AD2 Input.
94 AV
DD
33 P V
DD
& GND Analog 3.3V Power.
95 AD3 I A ADC AD3 Input.
96 AD4 I A ADC AD4 Input.
97 AD5 I A ADC AD5 Input.
98 AD6 I A ADC AD6 Input.
99 AD7 I A ADC AD7 Input.
100 AD8 I A ADC AD8 Input.
101 AD9 I A ADC AD9 Input.
102 VREFH I/O A ADC Max Reference Voltage input for ADC.
(Internal Reference Voltage mode, it will be an output state)
103 VREFL I/O A ADC Min Reference Voltage input for ADC.
(Internal Reference Voltage mode, it will be an output state)
104 AV
DD
18 P V
DD
& GND Analog 1.8V Power.
105 AV
DD
33 P V
DD
& GND Analog 3.3V Power.
106 DA0 (TSCON) O A DAC DA0 output. (Track Servo output)
107 DA1 (SLED) O A DAC DA1 output. (Sled Servo output)
108 DA2 (FSCON) O A DAC DA2 output. (Forcus Servo output)
109 DA3 (SLED2_
TILT) O A DAC DA3 output. (Sled Servo / Tilt Servo output)
110 AV
SS
P V
DD
& GND Analog Ground
111 FG I D SPM FG signal input. *
112 SPWM1 O D SPM Spindle motor PWM output 1.
113 SPWM2 O D SPM Spindle motor PWM output 2.
114 GPWM0 O D General PWM Multi-purpose PWM output 0.
115 GPWM1 O D General PWM Multi-purpose PWM output 1.
116 GPWM2 O D General PWM Multi-purpose PWM output 2.
117 GPWM3 O D General PWM Multi-purpose PWM output 3.
118 GPWM4 O D General PWM Multi-purpose PWM output 4.
119 GPWM5 O D General PWM Multi-purpose PWM output 5.
120 XLCAS O D DRAM I/F DRAM LCAS output. (Low-Byte row address strobe output)
121 XUCAS O D DRAM I/F DRAM UCAS output. (Upper-Byte row address strobe output)
122 XMOE O D DRAM I/F DRAM output enable.
123 RA11 O D DRAM I/F DRAM address output terminal 11.
124 RA10 O D DRAM I/F DRAM address output terminal 10.
125 DV
SS
P V
DD
& GND Digital Ground.
126 RA9 O D DRAM I/F DRAM address output terminal 9.
127 RA8 O D DRAM I/F DRAM address output terminal 8.
128 RA7 O D DRAM I/F DRAM address output terminal 7.
129 RA6 O D DRAM I/F DRAM address output terminal 6.
130 RA5 O D DRAM I/F DRAM address output terminal 5.
131 DV
DD
33 P V
DD
& GND Digital 3.3V Power. (for I/O)
132 RA4 O D DRAM I/F DRAM address output terminal 4.
133 RA3 O D DRAM I/F DRAM address output terminal 3.
134 RA2 O D DRAM I/F DRAM address output terminal 2.
135 RA1 O D DRAM I/F DRAM address output terminal 1.
136 DV
DD
18 P V
DD
& GND Digital 1.8V Power. (for Internal Logic power)
137 RA0 O D DRAM I/F DRAM address output terminal 0.
138 XRAS O D DRAM I/F DRAM RAS output. (Column address strobe output)
139 XMWR O D DRAM I/F DRAM Write enable.
140 RD7 I/O D DRAM I/F DRAM data input/output terminal 7. *
141 RD6 I/O D DRAM I/F DRAM data input/output terminal 6. *
142 DV
SS
P V
DD
& GND Digital Ground.
143 RD5 I/O D DRAM I/F DRAM data input/output terminal 5. *
144 RD4 I/O D DRAM I/F DRAM data input/output terminal 4. *
145 RD3 I/O D DRAM I/F DRAM data input/output terminal 3. *
146 RD2 I/O D DRAM I/F DRAM data input/output terminal 2. *
147 RD1 I/O D DRAM I/F DRAM data input/output terminal 1. *
148 RD0 I/O D DRAM I/F DRAM data input/output terminal 0. *
149 RD15 I/O D DRAM I/F DRAM data input/output terminal 15. *
No. Terminal Name I/O A/D Classification Function PU PD SMT