DM9161B
Layout Guide
Version: DM9161B-LG-V10
3
August 9, 2007
•
It is recommended that RX
±
receive and TX
±
transmit traces turn at 45
°
angle. Do not turn at right angle.
B e tt e r
W o r s e
•
Avoid using vias in routing the traces of RX
±
pair and TX
±
pair.
•
The
RX
±
pair, TX
±
pair, clock, should be routed to have characteristic impedance of 50 Ohm.
•
Do not place the DM9161B RX
±
receive pair across the TX
±
transmit pair. Keep the receive pair away from
the transmit pair (no less than 3mm). It’s better to place ground plane between these two pairs of traces.
•
The network interface (see Figure 3-1 and Figure 4) does not route any digital signal between the DM9161B
RX
±
and TX
±
pairs to the RJ-45. Keep the two pairs away from all the other active signals and the chassis
ground.
•
It should be no power or ground plane in the area under the network side of the 10/100M magnetic and the
area under the RJ-45 connector.
•
Any terminated pins of the RJ-45 connector (pins 4,5,7 and 8, see Figure 1) and the magnetic (see Figure 1)
should be tied as closely as possible to the chassis ground through a resistor divider network 75
Ω
resistors
(no more than 2mm to the magnetic) and a 0.01µF/2KV bypass capacitor.
•
The Band Gap resistor should be placed as close as possible to pins 47 and 48 (BGRES, BGRESG) (no
more than 3mm). Avoid running any high-speed signal near the Band Gap resistor placement (no less than
3mm from 25MHz XT1 and XT2).
