Dave Embedded Systems Axel ULite, Руководство по оборудованию

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AXEL ULite Hardware Manual v.1.0.2
Pin Name Pin Internal Connections Ball/pin #
NAND_DATA04 J2.112 CPU.NAND_DATA04 C6
NAND_DATA05 J2.114 CPU.NAND_DATA05 B6
NAND_DATA06 J2.116 CPU.NAND_DATA06 A6
NAND_DATA07 J2.118 CPU.NAND_DATA07 A5
6.2 Variant base peripherals
6.2.1 FULL GPIO configuration
The i.MX6UL GPIO module provides general-purpose pins that can be
configured as either inputs or outputs, for connections to external
devices. In addition, the GPIO peripheral can produce CORE interrupts.
The device contains 5 GPIO blocks and each GPIO block is made up to
32 identical channels. The device GPIO peripheral supports up to 124
3.3-V GPIO pins. Each channel must be properly configured, since GPIO
signals are multiplexed with other interfaces signals. For more
information on how to configure and use GPIOs, please refer to section
5.6. For additional details, please refer to chapter 26 of the i.MX6UL
APRM Rev.1.
August, 2019 42/65