3
2. BLOCK STRUCTURE
Each of the blocks contains the sync sequence, address subblock, ID subblock, length
subblock, payload subblock (if needed) and the check-sum subblock (CRC).
2.1. The sync subblock consists of the bytes 0E2h and 0E4h; they are transmitted in
the beginning of any block.
2.2. Address subblock consists of 4 bytes. The beginning 2 bytes carry the type (the 1
st byte) and the address (the 2nd byte) of the Device which the block is being
addressed to; the next 2 bytes carry the type (the 3
rd
byte) and the address (the 4th
byte) of the Device which is preparing this certain block for the transmission
1
.
The address subblock follows the sync subblock.
2.3. The ID subblock describes the type of the payload being transmitted in this block
and it consists of 2 bytes.
2.3.1. When the Master transmits a block to a Slave, the 1st byte of the ID subblock
carries an instruction and the payload subblock data are the argument. The highest
but if the 2nd byte of the ID subblock must be set to 0. The remaining bits of this
byte are reserved to future extensions of the Protocol and must be set to 0 in this
revision of the Protocol.
List of the instructions:
2.3.1.1. 000h — initialize the address pointer
2
.
4 bytes if the payload subblock must be interpreted as the address. The response
block must be transmitted without the payload subblock;
2.3.1.2. 001h- read the current address pointer
2
.
The instruction is transmitted with argument equal with 4 (in the payload subblock of
the control block) which means there must 4 bytes in the payload subblock of the
response block (4 bytes of the current address pointer).
2.3.1.3. 002h — write data into a page buffer of the corresponding EEPROM
beginning with the current address
3
.
Содержание SE-2850
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