Data General AViiON Series, Клиентская документация

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Assigning VME Data Bus and Interrupt Priorities
E-2
014–001867
Daisy chain A priority grant signal that originates at the start of the
priority VMEbus and propagates down the bus to the last slot. Each
board on the bus can allow the grant to pass to the next board or
take the bus and stop the grant. The signal jumps over empty
slots.
Prioritized Bus Arbitration
As you add VME controllers to the system, you must assign a DTB priority level to
each. You set priority in two ways: either fixed or daisy chained. For each board in
the system you can assign any one of four fixed priority levels that are independent
of where the board is positioned within the system. These priority levels are
numbered 0 through 3, with 3 being the highest and 0 the lowest priority. The
arbiter controls the priority hierarchy. It resides in the host and consists of
hardware and software that manages the interaction of the four priority levels.
Second, each fixed level includes a daisy chained priority signal, named Bus Grant
(BG). The boards gate or pass the Bus Grant signal along the bus depending on their
fixed (assigned) priority level. The fixed priority hierarchy always takes precedence
over the Bus Grant hierarchy. A description of how the Bus Grant priority chain
works is in a later section.
In Data General AViiON systems, the arbiter is always associated with Slot 1 (either
through physical location or logical extension via repeaters). It carries a priority
level of 3, the highest priority on the bus.
Figure E–1 shows an example of how fixed–level priority settings and board
positioning within the system affect overall DTB priority arbitration.
BG3
BG2
BG1
BG0
Slot 1 Slot 2 Slot 3 Slot 4 Slot 5 Slot 6
X X
X X
X
X
NOTE: X– Indicates that the board in this slot has been assigned this priority level.
The arbiter is always 3.
Arbiter
Figure E–1 Example of Fixed Prioritized Assignments
The example in Figure E–1 shows an AViiON system with fixed priority DTB
assignments. In this example, the priority arbitration sequences according to the
following slot order: