DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
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Table 3-2. Pin Description by Symbol
PIN NAME
TYPE
FUNCTION
3 8MCLK
O
8.192MHz
Clock
13 8XCLK
O
Eight-Times
Clock
66
A0
I
Address Bus Bit 0
67
A1
I
Address Bus Bit 1
68
A2
I
Address Bus Bit 2
69
A3
I
Address Bus Bit 3
70
A4
I
Address Bus Bit 4
71
A5
I
Address Bus Bit 5
72
A6
I
Address Bus Bit 6
73
ALE (AS)/A7
I
Address Latch Enable/Address Bus Bit 7
11
BTS
I
Bus Type Select
36 CI
I
Carry
In
54 CO
O
Carry
Out
75
CS
I
Chip Select, Active Low
56
D0/AD0
I/O
Data Bus Bit0/ Address/Data Bus Bit 0
57
D1/AD1
I/O
Data Bus Bit1/ Address/Data Bus Bit 1
58
D2/AD2
I/O
Data Bus Bit 2/Address/Data Bus 2
59
D3/AD3
I/O
Data Bus Bit 3/Address/Data Bus Bit 3
62
D4/AD4
I/O
Data Bus Bit4/Address/Data Bus Bit 4
63
D5/AD5
I/O
Data Bus Bit 5/Address/Data Bus Bit 5
64
D6/AD6
I/O
Data Bus Bit 6/Address/Data Bus Bit 6
65
D7/AD7
I/O
Data Bus Bit 7/Address/Data Bus Bit 7
44, 61, 81, 83
DVDD
—
Digital Positive Supply
45, 60, 80, 84
DVSS
—
Digital Signal Ground
76
FMS
I
Framer Mode Select
25
INT
O Interrupt
4
JTCLK
I
IEEE 1149.1 Test Clock Signal
7
JTDI
I
IEEE 1149.1 Test Data Input
10
JTDO
O
IEEE 1149.1 Test Data Output
2
JTMS
I
IEEE 1149.1 Test Mode Select
5
JTRST
I
IEEE 1149.1 Test Reset, Active Low
12
LIUC
I
Line Interface Connect
21
MCLK
I
Master Clock Input
55 MUX
I
Bus
Operation
8, 9, 15, 23, 26,
27, 28
N.C.
—
No Connect. Do not connect any signal to this pin.
1
RCHBLK
O
Receive Channel Block
92
RCHCLK
O
Receive Channel Clock
6
RCL
O
Receive Carrier Loss
82 RCLK
O
Receive
Clock
88 RCLKI
I
Receive
Clock
Input
89
RCLKO
O
Receive Clock Output
74
RD
(
DS
)
I
Read Input (Data Strobe), Active Low
85 RDATA
O
Receive
Data
97
RFSYNC
O
Receive Frame Sync
79
RLCLK
O
Receive Link Clock