Cypress S6J3200 Series, Руководство пользователя

Страница: 857 / 1355

CHAPTER 22:Media Local Bus Interface (MediaLB)
856 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.9.
MediaLBn Isochronous Base Address Configuration Register
(MLBn_IBCR)
MediaLBn Isochronous Base Address Configuration Register (MLBn_IBCR) defines the base address for
control receive/transmit system memory buffers.
REGISTER_NAME YOURPERIn_CSRi
OFFSET 0 + i*4
ACCESS_SIZE B H W
MULTIPLE 0:15
NUMERIC_TYPE
OTHER
MediaLB Isochronous Base Address Configuration Register (MLBn_IBCR)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME IRBA[15] IRBA[14] IRBA[13] IRBA[12] IRBA[11] IRBA[10] IRBA[9] IRBA[8]
ACCESS_TYPE RpWp RpWp RpWp RpWp R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME IRBA[7] IRBA[6] IRBA[5] IRBA[4] IRBA[3] IRBA[2] IRBA[1] IRBA[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME ITBA[15] ITBA[14] ITBA[13] ITBA[12] ITBA[11] ITBA[10] ITBA[9] ITBA[8]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME ITBA[7] ITBA[6] ITBA[5] ITBA[4] ITBA[3] ITBA[2] ITBA[1] ITBA[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:16] IRBA[15:0] : Upper Half of Isochronous Receive Base Address for DMA mode
These bits allow the system software to define the base address (IRBA[31:16]) for isochronous receive
system memory buffers.
This base address is shared by all isochronous receive channels and defines the upper 16 bits of the
32-bit system bus address for these channels.
This bit field is only used in DMA mode. In IO mode these bits are not used.