Cypress S6J3200 Series, Руководство пользователя

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CHAPTER 31:Memory Protection Unit for AXI
1140 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
Highest address = Wrap bo (num_bytes x num_transfers) – 1
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MPU Access Permissions
Region control registers in MPU AXI, MPUXn_CTRL1 to MPUXn_CTRL8 are used to control the access
permission for region 1 to region 8 respectively. Also MPUXn_CTRL0 is used to control the access
permission for background region.
Table 3-1 Access Permissions
AP Bits Access in Privileged
Mode
Access in Non- Privileged
Mode
Comment
000 (default) No access No access All bus accesses are blocked and hence would
generate memory protection violation.
001 read, write No access Reads and writes are permitted in privileged mode
only. Any access in non- privileged mode would
generate memory protection violation.
010 read, write read only Reads and writes are permitted in privileged mode.
Only reads are permitted in non-privileged mode.
Writes in non- privileged mode would generate
memory protection violation.
011 read, write read, write All bus transfers are permitted. No memory
protection violation is generated in this mode.
100 No access No access All bus accesses are blocked and hence generate
memory protection violation.
101 read only No access Reads are permitted in privileged mode only. Writes
in privileged mode and any access in non-privileged
mode would generate memory protection violation.
110 read only read only Reads are permitted in privileged as well as
non-privileged mode. Any write access would
generate memory protection violation.
111 read, write read, write All bus transfers are permitted. No memory
protection violation is generated in this mode.