S6E2CC/C5/C4/C3/C2/C1 Series Flash Programming Specification, Document Number: 002-04913 Rev. *D
7
1.1 Overview
This series is equipped with 1064 KBytes to 2088 KBytes of built-in MainFlash memory.
The built-in MainFlash memory can be erased data of sector-by-sector, all-sector of each macro batch erased data, and
programmed data in units of half words (16 bits) by the Cortex-M4 CPU.
This flash memory also has built-in ECC (Error Correction Code) functionality.
Flash Memory Features
Usable capacity:
Minimum configuration: 1024 K + 40 Kbytes
Maximum configuration: 2048 K + 40 Kbytes
Because this series stores ECC codes, it is equipped with additional flash memory of 7 bits for every 4 bytes of memory
described above.
High-speed flash:
Up to 72 MHz 0Wait
Up to 200 MHz Allowing Flash accelerator function (prefetch buffer/trace buffer) will achieve 0 Wait at high speed
operational frequency
Operating mode:
1. CPU ROM mode
This mode only allows reading of flash memory data. Word access is available. However, in this mode, it is not
possible to activate the automatic algorithm
*1
to perform writing or erasing.
2. CPU programming mode
This mode allows reading, writing, and erasing of flash memory (automatic algorithm
*1
). Because word access is not
available, programs that are contained in the flash memory cannot be executed while operating in this mode. Half-
word access is available.
3. ROM writer mode
This mode allows reading, writing, and erasing of flash memory from a ROM writer (automatic algorithm
*1
).
Built-in flash security function
(Prevents reading of the content of flash memory by a third party)
See "CHAPTER 2 Flash Security" for details on the flash security function.
Equipped with an Error Correction Code (ECC) function that can correct up to 1 bit of errors in each word.(The device is
not equipped with a function to detect 2-bit errors.) Errors are automatically corrected when memory is read.
Furthermore, ECC codes are automatically added upon writing to flash memory. Because there are no read cycle
penalties as a result of error correction, it is not necessary to consider the error correction penalties during software
development.
Built-in Dual flash mode
Dual flash mode allows accessing Flash Macro #0 and Flash Macro #1 independently.
Also this flash memory has Re-Map function. It allows assigning any macro to MainFlash memory area.
Note:
−
This document explains flash memory in the case where it is being used in CPU mode.
For details on accessing the flash memory from a ROM writer, see the instruction manual of the ROM writer that is
being used.
*1 : Automatic algorithm = Embedded Algorithm
