Document Number: 002-00886 Rev. *B
S29GL01GP
S29GL512P
S29GL256P
S29GL128P
3.
Block Diagram
Figure 3.1
S29GL-P Block Diagram
Input/Output
Buffers
X-Decoder
Y-Decoder
Chip Enable
Output Enable
Erase Voltage
Generator
PGM Voltage
Generator
Timer
V
CC
Detector
State
Control
Command
Register
V
CC
V
SS
V
IO
WE#
WP#/ACC
BYTE#
CE#
OE#
STB
STB
DQ15
–
DQ0
Sector Switches
RY/BY#
RESET#
Data
Y-Gating
Cell Matrix
Addre
ss Latch
A
Max
**–A0 (A-
** A
Max
GL01GP=A25, A
Max
GL512P = A24, A
Max
GL256P = A23, A
Max
GL128P = A22