PSoC® 6 BLE Prototyping Board Guide, Doc. # 002-24993 Rev. **
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Appendix
A.2.5.3
Functionality of J6 and J7 Headers (KitProg2)
The KitProg2 board contains two single in-line headers (J6 and J7). Both are 1×7-pin-headers, used
to pull out several pins of the PSoC 5LP device to support advanced features such as low-speed
oscilloscope and a low-speed digital logic analyzer. This header also contains KitProg2 UART and
I2C bridge pins that can be used when the two boards are separated.
The J6 and J7 headers support 100-mil spacing, so you can solder connectors to connect the Kit-
Prog2 board to a development breadboard.
Figure A-9. J6 and J7 Headers
Table A-3. Pin Details of J6 and J7 Headers
PSoC 5LP KitProg2 Header (J6)
PSoC 5LP KitProg2 Header (J7)
Pin
Signal
Description
Pin
Signal
Description
J6_01
P5LP_VDD Power
J7_01
GND
Ground
J6_02
GND
Ground
J7_02
P3.0
GPIO
J6_03
P12.5
GPIO
J7_03
P3.4
GPIO
J6_04
P12.0
GPIO/I2C_SCL
J7_04
P3.5
GPIO
J6_05
P12.1
GPIO/I2C_SDA
J7_05
P3.6
GPIO
J6_06
P12.7
GPIO/UART_RX
J7_06
P0.2
GPIO
J6_07
P12.6
GPIO/UART_TX
J7_07
P0.1
GPIO