Getting Started with EZ-BT WICED Modules
Document Number: 002-23400 Rev. **
6
3.2
EZ-BT WICED Module Low-Power Modes
EZ-BT WICED Modules support a variety of low-power modes, depending on the specific module selected. For details
on the current consumption and supported power modes for each module solution, see the module datasheet. The
power modes shown below are supported on the CYBT-423028-02 module:
▪
Active mode:
Normal operating mode in which all peripherals are available, and the CPU is active.
▪
Pause mode:
In this mode, the CPU is in “Wait for Interrupt” (WFI) and the HCLK, which is the high-frequency
clock derived from the main crystal oscillator, is running at a lower clock speed. Other clocks are active and the
state of the entire chip is retained. Pause mode is chosen when other low-power modes are not possible.
▪
PMU Sleep mode:
In this mode, the CPU is in WFI and the HCLK is not running. The Power Management Unit
(PMU) determines whether other clocks can be turned OFF and does so accordingly. The state of the entire chip
is retained, the internal LDOs run at a lower voltage (voltage is managed by the PMU), and SRAM is retained.
▪
Power Down Sleep (PDS) mode:
This mode is an extension of the PMU Sleep wherein most of the peripherals
such as UART and SPI are turned OFF. The entire memory is retained, and on wakeup the execution resumes
from where it paused.
▪
Shut Down Sleep (SDS):
Everything is turned OFF except the I/O Power Domain, Real Time Clock (RTC), and
LPO (Low-Power Oscillator). The device can come out of this mode either due to BT activity or by an external
interrupt. Before going into this mode, the application can store up to 256 bytes of data
into “Always On RAM”
(AON). When the device comes out of this mode, the data from AON is retained. After waking from SDS, the
application will start from the beginning (warm boot) and will restore its state based on information stored in AON.
In the SDS mode, a single BT task with no data activity, such as an ACL connection, BLE connection, or BLE
advertisement can be performed. The following guidelines and restrictions in usage apply to SDS mode.
•
The device address type should only be public.
•
The connection interval should be greater than 100 ms.
•
If the device is doing connectable advertisement in SDS mode, two connection requests need to be sent to
the device to connect to it: the first one to wake the device and the second one to make an actual connection.
If the device is already connected, there is no need to send any second connection request.
•
The pairing process cannot be done in SDS mode.
•
High-duty-cycle advertisement with a low interval will not allow the device to enter SDS. The device enters
SDS mode immediately when the device is configured for low-duty-cycle advertisements without any
advertisement time out (time out is set for infinity). If the low-duty-cycle advertisement is configured for a finite
time, the device will enter SDS only after this time expires (i.e., when the advertisement stops).
•
SDS is allowed only if the next activity is more than 100 ms away; otherwise PDS mode is used as frequent
wakeup from SDS will consume more power than staying in PDS mode.
•
To get a GPIO interrupt callback upon wake up, the interrupt callback needs to be registered in the application.
▪
HIDOFF (Timed-Wake) mode:
The device can enter this mode asynchronously, that is, the application can force
the device into this mode at any time. I/O Power Domain, RTC, and LPO are the only active blocks. A timer that
runs off the LPO is used to wake the device up after a predetermined fixed time. The mode can also be woken up
via an external interrupt.
▪
HIDOFF (External Interrupt-Waked) mode:
This mode is similar to Timed-Wake, but in HID-off mode, even the
LPO and RTC are turned OFF. So, the only wakeup source is an external interrupt.
Table 2. EZ-BT Module MPN Features and Capabilities
Marketing Part Number
Silicon Device
Active
Pause
PMU Sleep
PDS
SDS
Timed Wake and HID-OFF
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
