CY3273 Cypress Low Voltage Powerline Communication Evaluation Kit Guide, Doc. # 001-55382 Rev. *C
25
PLC LV Evaluation Board
Figure 3-7. DIP Switches for Manual Addressing on the PLC Evaluation Boards
Note that the powerline network protocol supports 8-bit logical addressing, 16-bit extended logical
addressing, and 64-bit physical addressing; all of these are supported through software. An external
host or PSoC microcontroller can talk to the CY8CPLC10 internal memory map to set the appropri-
ate mode and write a particular logical address.
Manual addressing is an easy method to quickly assign a particular address between 0 and 7 to the
board, which may be a node in a network.
Note
After changing the address of the node, press the RESET button on the PLC LV board for the
change to take effect.
3.4.3
Setting Up the I
2
C Address of the Node
S2[1] dip switch is used to assign a specific I
2
C address to the node to communicate with the exter-
nal microcontroller/PSoC or USB-I2C bridge. When the S2[1] switch is in the OFF position, the
address of the node is 0x01 and when the position is ON, the address of the node is 0x7A. For fur-
ther details on I
2
C addressing, refer to the data sheet available on the CD.
3.4.4
Jumper Settings for the PLC LV Boards
Figure 3-8. Six Jumpers Available on Board
