Cypress CapSense CY8CMBR2044, Руководство по конструкции

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CapSense Schematic Design
AN66308 - CY8CMBR2044 CapSense® Design Guide, Doc. No. 001-66308 Rev. *F 28
Design Validation
After you have prototyped and tested the button board, use the Serial Debug Data Out test mode ( Section 3.1.10
Serial Debug Data Out) to capture the raw count, baseline, difference count, and parasitic capacitance for all buttons.
To enter this information into Table C of the sheet, follow these steps
–
1. Enable the Serial Debug Data Out feature by connecting a 5.6 k
Ω resistor to GND on any CSx pin.
2. Power on the device and connect the CSx pin to the computer through a COM/RS232 port.
3. Open MultiChart and configure it as following
–
a. Select PORT - <Specify PORT number>
b. Port Speed
– 115200
c. Visible points
– 1000
d. Log file name
– “C:\MultiChart log\CY8CMBR2044.csv”
To know more about MultiChart, see AN2397
– CapSense Data Viewing Tools
4.
Click on “Enable/disable log-file”. This will automatically store the data to the log file. Log this data for at least
300 samples.
5.
Click on “Enable/disable log-file”. This will stop logging the data.
6. Open the log file once. The toolbox will automatically be updated with the relevant data.
Table A shows the various design parameter values, taken up from the previous sheets, so that you need not enter
any data in this sheet. This sheet provides a pass/fail grade for the prototype board. If your design fails, you can
redesign your system by entering new values in Table A and further recommendations/results will be given. If your
design passes, leave the “New value” column in Table A blank.
Figure 3-15 Design Validation
Inputs:

If the design passes
– None

If the design fails
–
o
New overlay thickness, overlay material permittivity, button diameter for each individual button, and
trace capacitance