F²MC-16FX Family, Hardware Set Up
Document No. 002-04772 Rev. *B
11
4.2
Latch-up consideration (switch)
Be careful with external switches to V
CC
or ground together with debouncing capacitors connected to port pins.
A usual configuration is shown in the following schematic:
R
PD
is a pull-down resistor and C
BD
a debouncing capacitor. If the switch SW is open, a “0” is read from the port pin
Pxy. If the switch is closed the input changes to “1”.
From the physical aspect, it has to be considered, that the switch is often placed in distance to the MCU by cable,
wire, or circuit path. The longer the circuit path is the higher will be its inductivity L
X
(and capacity C
X
).
An equivalent circuit diagram looks like the following illustration:
By closing the switch SW at time t
0
the following voltage can be measured at point (A):
But at the port pin Pxy on point (B) the following voltage can be measured: