Curtiss-Wright FHF5-PC4MWB04-00, Справочник по аппаратуре

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REGISTERS
Copyright 2017 6-8 FibreXtreme Hardware Reference
6.4.5 Link Status (LINK_STAT)
– Offset 0x0C
Field Description Access Reset
Value
7 to 0 8B10B Errors
– 8-bit counter counting the current
number of 8B10B decoding errors discovered. Cleared
through ‘Reset SR’ in LINK_CTL
R 0x00
8 Link Down
– A ‘1’ indicates the link has gone down at
some point si
nce the last ‘Reset SR’. A ‘0’ indicates the
link has not gone down since the last ‘Reset SR’. This
bit is cleared through ‘Reset SR’ in LINK_CTL.
R 0
9 Link Up
– This bit reflects the current status of the link.
A ‘1’ indicates the link is currently up. A ‘0’ indicates the
link is currently down. Note that this bit is not latched
like the ‘Link Down’ bit.
R 0
10 Synchronization Error
– A ‘1’ indicates the card has
corrected a synchronization error on the incoming data
stream
. A ‘0’ indicates the card has not corrected a
synchronization error on the incoming data stream.
This bit is cleared through ‘Reset SR’ in LINK_CTL.
R 0
11 Checksum Error
– A ‘1’ indicates the card has detected
a checksum error on the incoming data stream
. A ‘0’
indicates the card has not detected a checksum error
on the incoming data stream. This bit is cleared
throu
gh ‘Reset SR’ in LINK_CTL.
R 0
12 RX FIFO Overflow
– A ‘1’ indicates the Receive FIFO
has overflowed. A ‘0’ indicates the Receive FIFO has
not overflowed. This bit is cleared through ‘Reset SR’ in
LINK_CTL.
R 0
13 TX FIFO Overflow
– A ‘1’ indicates the Transmit FIFO
has overflowed. A ‘0’ indicates the Transmit FIFO has
not overflowed. This bit is cleared through ‘Reset SR’ in
LINK_CTL.
R 0
31 to 14 Reserved None 0