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Congatec COM Express conga-TCA5, Руководство пользователя

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Copyright 

© 

2017 

congatec 

GmbH 

 

      TA50m19 

 

      

44/70

PDS

Pull-down strap. A module output pin that is either tied to GND or is not connected. Used 

to signal module capabilities (pinout type) to the Carrier Board. 

8.1 

Connector Signal Descriptions

Table 12   Connector A–B Pinout

Pin Row A

Pin Row B

Pin

Row A

Pin

Row B

A1 

GND (FIXED) 

B1 

GND (FIXED) 

A56

PCIE_TX4- 

B56

PCIE_RX4- 

A2 

GBE0_MDI3-

B2 

GBE0_ACT# 

A57

GND

B57

GPO2 

A3 

GB 

B3 

LPC_FRAME# 

A58

P 

B58

P 

A4 

GBE0_LINK100#

B4 

LPC_AD0 

A59

PCIE_TX3- 

B59

PCIE_RX3- 

A5 

GBE0_LINK1000# 

B5 

LPC_AD1 

A60

GND (FIXED)

B60

GND (FIXED)

A6 

GBE0_MDI2-

B6 

LPC_AD2 

A61

P 

B61

P 

A7 

GB 

B7 

LPC_AD3 

A62

PCIE_TX2- 

B62

PCIE_RX2- 

A8 

GBE0_LINK# 

B8 

LPC_DRQ0# *

1

A63

GPI1 

B63

GPO3 

A9 

GBE0_MDI1-

B9 

LPC_DRQ1# *

1

A64

P 

B64

P

A10  GB 

B10  LPC_CLK 

A65

PCIE_TX1- 

B65

PCIE_RX1- 

A11  GND (FIXED) 

B11  GND (FIXED) 

A66

GND

B66

WAKE0# 

A12  GBE0_MDI0-

B12  PWRBTN# 

A67

GPI2 

B67

WAKE1# 

A13  GB 

B13  SMB_CK 

A68

P 

B68

P

A14  GBE0_CTREF *

1

 

B14  SMB_DAT

A69

PCIE_TX0- 

B69

PCIE_RX0- 

A15  SUS_S3# 

B15  SMB_ALERT# 

A70

GND (FIXED)

B70

GND (FIXED)

A16  S 

B16  S 

A71

B71

 

A17  SATA0_TX-

B17  SATA1_TX-

A72

LVDS_A0-

B72

LVDS_B0- 

A18  SUS_S4# 

B18  SUS_STAT# 

A73

B73

 

A19  S 

B19  S 

A74

LVDS_A1-

B74

LVDS_B1- 

A20  SATA0_RX-

B20  SATA1_RX-

A75

B75

 

A21  GND (FIXED) 

B21  GND (FIXED) 

A76

LVDS_A2-

B76

LVDS_B2- 

A22  S *

1

 

B22  S *

1

A77

LVDS_VDD_EN

B77

 

A23  SATA2_TX- *

1

B23  SATA3_TX- *

1

A78

 

B78

LVDS_B3- 

A24  SUS_S5# 

B24  PWR_OK

A79

LVDS_A3- 

B79

LVDS_BKLT_EN

A25  S *

1

B25  S *

1

A80

GND (FIXED)

B80

GND (FIXED)

A26  SATA2_RX- *

1

B26  SATA3_RX- *

1

A81

LV

B81

LV 

Содержание COM Express conga-TCA5

Страница 1: ...COM Express conga TCA5 COM Express Type 6 Compact module based on the Intel Atom Pentium and Celeron Apollo Lake SoC User s Guide Revision 1 9...

Страница 2: ...ng Solutions and added table 7 Cooling Solution Variants Changed the recommended maximum torque specification for all cooling screws in section 4 Cooling Solutions Updated the supported Winbond flash...

Страница 3: ...congatec GmbH Updated the note in section 5 1 2 3 VGA Re arranged section 6 Additional Features Updated section 6 5 congatec Battery Management Interface 1 9 2021 11 16 AEM Deleted HDMI references fro...

Страница 4: ...r similar licenses You can find the specific details at https www congatec com en licenses Search for the revision of the BIOS UEFI or Board Controller Software as shown in the POST screen or BIOS set...

Страница 5: ...cally qualified personnel It is not intended for general audiences Lead Free Designs RoHS All congatec GmbH designs are created from lead free components and are completely RoHS compliant Electrostati...

Страница 6: ...loss of data Note Notes call attention to important information that should be observed Trademarks Product names logos brands and other trademarks featured or referred to within this user s guide or t...

Страница 7: ...air warranty period in effect as of the date the repaired exchanged or replaced product is shipped by congatec or the remainder of the original warranty whichever is longer This Limited Warranty exten...

Страница 8: ...cond kHz Kilohertz MHz Megahertz TDP Thermal Design Power PCIe PCI Express SATA Serial ATA DDC Display Data Channel SoC System On Chip LVDS Low Voltage Differential Signaling Gbe Gigabit Ethernet eMMC...

Страница 9: ...Interface 30 5 1 7 UART 30 5 1 8 ExpressCard 31 5 1 9 SD Card 31 5 1 10 GPIOs 31 5 1 11 LPC Bus 31 5 1 12 I C Bus 31 5 1 13 SPI 31 5 1 14 Power Control 32 5 1 15 Power Management 33 6 Additional Feat...

Страница 10: ...ess Assignment 65 9 1 1 LPC Bus 65 9 2 PCI Configuration Space Map 66 9 3 I C Bus 67 9 4 SM Bus 67 9 5 congatec System Sensors 68 10 BIOS Setup Description 69 10 1 Navigating the BIOS Setup Menu 69 10...

Страница 11: ...Table 18 DisplayPort DP Signal Descriptions 54 Table 19 CRT Signal Descriptions 55 Table 20 LVDS Signal Descriptions 56 Table 21 Serial ATA Signal Descriptions 56 Table 22 USB 2 0 Signal Descriptions...

Страница 12: ...Type 6 pinout definition and comply with COM Express 2 1 specification They are equipped with two high performance connectors that ensure stable data throughput The COM computer on module integrates...

Страница 13: ...three industrial The table below shows the different configurations available Table 2 Commercial Variants Part No 048530 048531 Processor Intel Celeron N3350 Dual Core 1 1 GHz Intel Pentium N4200 Quad...

Страница 14: ...GHz 1 8 GHz Graphics Intel HD Graphics 505 Intel HD Graphics 500 Intel HD Graphics 500 GFX Base Burst 500 MHz 650 Mhz 400 MHz 600 MHz 400 MHz 550 MHz Memory DDR3L 1866 MT s dual channel 1866 MT s dual...

Страница 15: ...ing transcode Up to 3 independent displays must be two DP DP HDMI DVI and one eDP LVDS 2x DP 1x LVDS 1x Optional eDP 1 3 1x Optional VGA Resolutions up to 4K NOTE 1 Variants that feature optional eDP...

Страница 16: ...nimum storage capacity of 20 GB We will not offer installation support for systems with less than 20 GB storage space 2 3 Mechanical Dimensions 95 0 mm x 95 0 mm 3 75 x 3 75 Height approximately 18 or...

Страница 17: ...ts Input Range Volts Derated Input Volts Max Input Ripple 10Hz to 20MHz mV Max Module Input Power w derated input Watts Assumed Conversion Efficiency Max Load Power Watts VCC_12V 12 12 11 4 12 6 11 4...

Страница 18: ...Minimum value Lowest frequency mode LFM with minimum core voltage during desktop idle S0 Maximum value Highest frequency mode HFM Turbo Boost The CPU was stressed to its maximum frequency S0 Peak val...

Страница 19: ...7 Windows 10 Intel Pentium N4200 4 1 1 2 5 0 12 1 04 1 85 0 11 0 10 Note With fast input voltage rise time the inrush current may exceed the measured peak current 2 6 Supply Voltage Battery Power Tabl...

Страница 20: ...ial variants Operation 40 to 85 C Storage 40 to 85 C Humidity Operation 10 to 90 Storage 5 to 95 Caution The above operating temperatures must be strictly adhered to at all times When using a congatec...

Страница 21: ...re connector 1 eMMC flash 1 MIPI CSI SuperSpeed 0 SuperSpeed 1 SuperSpeed 2 SuperSpeed 3 PCIe0 x1 PCIe1 x1 PCIe2 x1 PCIe3 x1 8x USB 2 0 HDA SATA0 SATA1 SM Bus SPI UART UART SD Card GPIOs I2C LID SLEEP...

Страница 22: ...die Intel Pentium and Celeron CPU variants Note 1 We recommend a maximum torque of 0 4 Nm for carrier board mounting screws and 0 5 Nm for module mounting screws 2 The gap pad material used on congat...

Страница 23: ...post feature the thermal stacks may move 4 Do not exceed the recommended maximum torque Doing so may damage the module or the carrier board or both 4 1 CSP Dimensions For Bare die Variants 76 15 87 8...

Страница 24: ...24 70 For Lidded Variants 76 15 87 87 21 40 41 4 18 4 22 29 95 95 M2 5 x 8 mm threaded standoff for threaded version or 2 7 x 10 mm non threaded standoff for borehole version 40 5 E 3 1 0 1 3 4 0 5 6...

Страница 25: ...HSP Dimensions For Bare die Variants 95 95 4 11 40 5 C 4 5 0 1 60 R 0 5 2 x R 1 4 x 7 9 4 0 5 28 15 C 0 8 0 8 76 15 87 87 21 40 41 4 18 4 M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 1...

Страница 26: ...26 70 For Lidded Variants 95 95 4 11 40 5 C 3 1 0 1 60 R 0 5 2 x R 1 4 x 0 5 4 7 9 28 15 C 0 8 0 8 76 15 87 87 21 40 41 4 18 4 M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 11 mm non th...

Страница 27: ...rows 5 1 1 PCI Express The conga TCA5 offers three PCI Express lanes on the A B connector The lanes support up to 5 GT s Gen 2 speed a 3 x1 link configuration an optional 1 x2 1 x1 link configuration...

Страница 28: ...pports the following up to two DP ports VESA DisplayPort Standard 1 2 up to 4096x2160 at 60 Hz maximum of two independent DP displays 5 1 2 2 LVDS The conga TCA5 offers an LVDS interface with optional...

Страница 29: ...peed differential signals on the C D connector The xHCI host controller supports the following USB 3 0 Specification SuperSpeed High Speed Full Speed and Low Speed USB signaling data transfers of up t...

Страница 30: ...tion It is only active during a 100 Mb or 1 Gb connection This is a limitation of Ethernet Phy since it only has 3 LED outputs ACT LINK100 and LINK1000 2 The GBE0_LINK signal is a logic AND of the GBE...

Страница 31: ...lel data lines 5 1 10 GPIOs The conga TCA5 offers General Purpose Input Output signals on the A B connector 5 1 11 LPC Bus The conga TCA5 offers the LPC Low Pin Count bus on the A B connector For info...

Страница 32: ...board hardware must drive this signal low until all power rails and clocks are stable Releasing PWR_OK too early or not driving it low at all can cause numerous boot up problems It is a good design p...

Страница 33: ...is the sole operational power source for the conga TCA5 The remaining necessary voltages are generated internally on the module using onboard voltage regulators A carrier board designer should be awa...

Страница 34: ...of the congatec BIOS features It fully isolates some of the embedded features such as system monitoring or the I C bus from the x86 core architecture which results in higher embedded feature performa...

Страница 35: ...UT FAN_TACHIN implementation see the COM Express Design Guide 6 3 3 Power Loss Control The cBC has full control of the power up of the module and therefore can be used to specify the behavior of the s...

Страница 36: ...y themselves using the congatec system utility CGUTIL See congatec application note AN8_Create_OEM_Default_Map pdf on the congatec website for details on how to add OEM default settings to the congate...

Страница 37: ...OEM DXE driver 6 5 congatec Battery Management Interface To facilitate the development of battery powered mobile systems based on embedded modules congatec GmbH defined an interface for the exchange o...

Страница 38: ...tware that runs unmodified on all congatec CPU modules All the hardware related code is contained within the congatec embedded BIOS on the module See section 1 1 of the CGOS API software developers gu...

Страница 39: ...Uses Power Aware Interrupt Routing Uses 14 nm process technology Note Intel Hyper Threading technology is not supported four cores execute four threads 7 1 1 1 Intel Virtualization Technology Intel V...

Страница 40: ...sive cooling trip point setup node in the BIOS setup program to determine the temperature threshold that the operating system will use to start or stop the passive cooling procedure Critical Trip Poin...

Страница 41: ...ally from S3 PME Activate the wake up capabilities of a PCI device using Windows Device Manager configuration options for this device OR set Resume On PME to Enabled in the Power setup menu USB Mouse...

Страница 42: ...t 2 USB 3 0 USB 2 0 Port 1 Port 0 Port 4 Port 5 Port 6 Port 7 COM Express Connector Port 3 Port 2 xHCI USB 2 0 Port 1 USB 2 0 Port 0 Apollo Lake SoC OR OR OR OR USB 2 0 Port 3 USB 2 0 Port 7 USB 2 0 P...

Страница 43: ...The Signal Description tables do not list internal pull ups or pull downs implemented by the chip vendors Only pull ups or pull downs implemented by congatec are listed For information about the inter...

Страница 44: ...LPC_DRQ1 1 A64 PCIE_TX1 B64 PCIE_RX1 A10 GBE0_MDI1 B10 LPC_CLK A65 PCIE_TX1 B65 PCIE_RX1 A11 GND FIXED B11 GND FIXED A66 GND B66 WAKE0 A12 GBE0_MDI0 B12 PWRBTN A67 GPI2 B67 WAKE1 A13 GBE0_MDI0 B13 SM...

Страница 45: ...4 B39 USB5 A94 SPI_CLK B94 VGA_VSYNC 2 A40 USB4 B40 USB5 A95 SPI_MOSI B95 VGA_I2C_CK 2 A41 GND FIXED B41 GND FIXED A96 TPM_PP B96 VGA_I2C_DAT 2 A42 USB2 B42 USB3 A97 TYPE10 1 B97 SPI_CS A43 USB2 B43 U...

Страница 46: ...G_RX5 1 D69 PEG_TX5 1 C15 DDI1_PAIR6 1 D15 DDI1_CTRLCLK_AUX C70 GND FIXED D70 GND FIXED C16 DDI1_PAIR6 1 D16 DDI1_CTRLDATA_AUX C71 PEG_RX6 1 D71 PEG_TX6 1 C17 RSVD D17 RSVD C72 PEG_RX6 1 D72 PEG_TX6 1...

Страница 47: ...GND C42 DDI3_PAIR1 1 D42 DDI2_PAIR1 C97 RVSD D97 RSVD C43 DDI3_PAIR1 1 D43 DDI2_PAIR1 C98 PEG_RX14 1 D98 PEG_TX14 1 C44 DDI3_HPD 1 D44 DDI2_HPD C99 PEG_RX14 1 D99 PEG_TX14 1 C45 RSVD D45 RSVD C100 GND...

Страница 48: ...ation Revision 2 0 PCIE_TX3 PCIE_TX3 A58 A59 PCI Express channel 3 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 2 0 PCIE_RX4 PCIE_RX4 B55 B56 PCI Express c...

Страница 49: ..._RX7 PEG_RX8 PEG_RX8 PEG_RX9 PEG_RX9 PEG_RX10 PEG_RX10 PEG_RX11 PEG_RX11 PEG_RX12 PEG_RX12 PEG_RX13 PEG_RX13 PEG_RX14 PEG_RX14 PEG_RX15 PEG_RX15 C52 C53 C55 C56 C58 C59 C61 C62 C65 C66 C68 C69 C71 C72...

Страница 50: ...PEG_TX15 PEG_TX15 D52 D53 D55 D56 D58 D59 D61 D62 D65 D66 D68 D69 D71 D72 D74 D75 D78 D79 D81 D82 D85 D86 D88 D89 D91 D92 D94 D95 D98 D99 D101 D102 PCI Express Graphics Transmit Output differential pa...

Страница 51: ...xed with DP1_HPD and HDMI1_HPD I 3 3V PD 100k DDI1_CTRLCLK_AUX D15 Multiplexed with SDVO1_CTRLCLK DP1_AUX and HDMI1_CTRLCLK DP AUX function if DDI1_DDC_AUX_SEL is no connect HDMI DVI I2C CTRLCLK if DD...

Страница 52: ...ls I 3 3V PD 1M DDI3_PAIR0 DDI3_PAIR0 C39 C40 Multiplexed with DP3_LANE0 and TMDS3_DATA2 Multiplexed with DP3_LANE0 and TMDS3_DATA2 O PCIE Not connected DDI3_PAIR1 DDI3_PAIR1 C42 C43 Multiplexed with...

Страница 53: ...I2_PAIR3 and DDI2_PAIR3 O PCIE TMDS2_DATA0 TMDS2_DATA0 D46 D47 TMDS differential pair Multiplexed with DDI2_PAIR2 and DDI2_PAIR2 O PCIE TMDS2_DATA1 TMDS2_DATA1 D42 D43 TMDS differential pair Multiplex...

Страница 54: ...Uni directional main link for the transport of isochronous streams and secondary data Multiplexed with DDI1_PAIR0 and DDI1_PAIR0 O PCIE DP1_HPD C24 Detection of Hot Plug Unplug and notification of th...

Страница 55: ...IR0 and DDI3_PAIR0 O PCIE DP3_HPD C44 Detection of Hot Plug Unplug and notification of the link layer Multiplexed with DDI3_HPD I 3 3V PD 100k DP3_AUX C36 Half duplex bi directional AUX channel for se...

Страница 56: ...D 10k LVDS_BKLT_EN B79 LVDS panel backlight enable O 3 3V PD 10k LVDS_BKLT_CTRL B83 LVDS panel backlight brightness control O 3 3V PD 10k LVDS_I2C_CK A83 DDC lines used for flat panel detection and co...

Страница 57: ...mpatible to USB 1 1 USB2 A43 USB Port 2 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB2 A42 USB Port 2 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB3 B43 USB...

Страница 58: ...ine low I 3 3VSB PU 10k 3 3VSB Do not pull this line high on the carrier board Table 23 USB 3 0 Signal Descriptions Signal Pin Description I O PU PD Comment USB_SSRX0 C4 Additional receive signal diff...

Страница 59: ...which the reference is shorted to ground the current shall be limited to 250mA or less Not connected GBE0_SDP Gigabit Ethernet Controller 0 Software definable Pin Can also be used for IEEE1588 support...

Страница 60: ...rrupt I O 3 3V LPC_CLK B10 LPC clock output 25MHz nominal O 3 3V Table 28 SPI BIOS Flash Interface Signal Descriptions Signal Pin Description I O PU PD Comment SPI_CS B97 Chip select for Carrier Board...

Страница 61: ...ose I O Signal Descriptions Signal Pin Description I O PU PD Comment GPO0 A93 General purpose output pins Shared with SD_CLK Output from COM Express input to SD O 3 3V GPO1 B54 General purpose output...

Страница 62: ...s system is in Suspend to Disk state Active low output O 3 3VSB SUS_S5 A24 Indicates system is in Soft Off state O 3 3VSB Not supported by chipset Shorted with SUS_S4 WAKE0 B66 PCI Express wake up sig...

Страница 63: ...d to GND TYPE2 TYPE1 TYPE0 X NC NC NC NC GND X NC NC GND GND NC X NC GND NC GND NC Pinout Type 1 Pinout Type 2 Pinout Type 3 no IDE Pinout Type 4 no PCI Pinout Type 5 no IDE no PCI Pinout Type 6 no ID...

Страница 64: ...for standby and suspend functions May be left unconnected if these functions are not used in the system design P VCC_RTC A47 Real time clock circuit power input Nominally 3 0V P GND A1 A11 A21 A31 A4...

Страница 65: ...o Motherboard resources 0CF8 0CFB 4 bytes No PCI configuration address register 0CFC 0CFF 4 bytes No PCI configuration data register 0D00 F000 See note PCI PCI Express bus Note The BIOS assigns PCI an...

Страница 66: ...6 PCI Configuration Space Map Bus Number hex Device Number hex Function Number hex Device ID Description and Device ID 00h 00h 00h 0x5AF0 Host Bridge 00h 02h 00h 0x5A84 Graphics and Display 00h 0Dh 00...

Страница 67: ...01Ch 01h 0x5ACC eMMC 00h 01Fh 00h 0x5AE8 LPC Bus 00h 01Fh 01h 0x5AD4 SM Bus 02h 00h 00h 0x1539 Intel PCIe Ethernet Network on Module Note 1 To view these ports attach a device to the corresponding PCI...

Страница 68: ...sensors CPU temperature based on CPU Digital Thermal Sensor Board temperature sensor located on the Board Controller voltage sensors 5V standard voltage sensor 5V standby voltage sensor current sensor...

Страница 69: ...com Note If you do not have access to the restricted area of the congatec website contact your local congatec sales representative 10 1 Navigating the BIOS Setup Menu The BIOS setup menu shows the fea...

Страница 70: ...Note 1 Deprecated Caution The DOS command line tool is not officially supported by congatec and therefore not recommended for critical tasks such as firmware updates We recommend to use only the UEFI...

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