RCIM III Registers
B-19
Figure B-27 RCIM III GPS Debug Control Register
The GPS debug control register contains bits used during testing and debug. Setting any of these bits will
disable RCIM communication with the GPS module.
Offset: 03208
Figure B-28 RCIM III GPS Communication Error Register
The GPS communication error register contains counts of communication errors with the GPS module.
Any write to this register will reset the communication interface to the GPS module.
Offset: 0320C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Bits
Reserved
Enable GPS External Communication
Enable UART Loopback
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PPS Okay Count
Parity Error
Short Start Error
Reserved
Bits
Содержание RCIM
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