Operation Theory
Page 15
CPQ-C1786FNSL/T (FS7550/V7550)
4-5 Video Amplifier Section
1. RGB signal inputs are terminated by R501, R531 and R561 then pass through the coupling capacitors
C503, C533 and C563 to IC501 LM1267 preamplifier.
2. The amplifier RGB signals (0~3 Vpp) are adjusted by I
2
C bus, I501 pin 23 is for clamp pulse which comes
from pin 16 of TDA4841 to set up equal clamp level.
3. The video output stages are amplified by I502 (LM2467).
4. The RGB cathodes cut off are adjusted by I503 (LM2479) pin 8, 7, 6, which comes from I501 pin 16, 15,
14 to adjust cut iff voltage level by I
2
C bus.
5. Under override condition, NO SIGNAL will show up on the screen.
4-6 OSD (On Screen Display) Circuit
1. The I504 MTV021-08 is OSD IC. The OSD signals are worked by positive vertical pulse from I701 pin
34 that goes through R720 to I502 pin 10, and positive horizontal pulse from T402 pin 5 goes through R496
to I502 pin 5. CPU I701 pin 13, 12 (I
2
C bus) transfers information to I502 pin 7, 8.
2. The OSD R. G. B signals and blanking signal are terminated at I502 pin 15, 14, 13, and 12 to I501 pin 1,
2, 3 and 4 then the OSD picture appears.