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GRMON3-UM
June 2019, Version 3.1.0
80
www.cobham.com/gaisler
The pci scan command may fail if the PCI buses (PCI-PCI bridges) haven't been enumerated correctly in a mul-
ti-bus PCI system.
After registering the PCI bus into GRMON's device handling system commands may access device information
and Tcl may access variables (PCI configuration space registers). Accessing bad PCI regions may lead to target
deadlock where the debug-link may disconnect/hang. It is the user's responsibility to make sure that GRMON's PCI
information is correct. The PCI bus may need to be re-scanned/unregistered when changes to the PCI configuration
has been made by the target OS running on the LEON.
6.17.1. PCI Trace
The pci trace commands are supported by the cores PCITRACE, GRPCI2 and GRPCI2_TB. The commands can
be used to control the trace and viewing trace data. With the commands it is possible to set up trigger conditions that
must match to set the trigger off. When the triggering condition is matched the AHBTRACE stops the recording
of the PCI bus and the log is available for inspection using the pci trace log command. The pci trace tdelay
command can be used to delay the stop of the trace recording after a trigging match.
The info sys command displays the size of the trace buffer in number of lines.
pcitrace0 Cobham Gaisler 32-bit PCI Trace Buffer
APB: C0101000 - C0200000
Trace buffer size: 128 lines
pci0 Cobham Gaisler GRPCI2 PCI/AHB bridge
AHB Master 5
AHB: C0000000 - D0000000
AHB: FFF00000 - FFF40000
APB: 80000600 - 80000700
IRQ: 6
Trace buffer size: 1024 lines
pcitrace1 Cobham Gaisler GRPCI2 Trace buffer
APB: 80040000 - 80080000
Trace buffer size: 1024 lines
6.18. SPI
The SPICTRL debug driver provides commands to configure the SPI controller core. The driver also enables the
user to perform simple data transfers. The info sys command displays the core’s FIFO depth and the number of
available slave select signals.
spi0 Cobham Gaisler SPI Controller
APB: C0100000 - C0100100
IRQ: 23
FIFO depth: 8, 2 slave select signals
Maximum word length: 32 bits
Supports automated transfers
Supports automatic slave select
Controller index for use in GRMON: 0
The SPICTRL core is accessed using the command spi, see command description in Appendix B, Command syntax
for more information.
The debug driver has bindings to the SPI memory device layer. These commands are accessed via spi flash. Please
see Section 3.11.2, “SPI memory device” for more information.
NOTE: For information about the SPI memory controller (SPIMCTRL), see Section 6.14, “Memory controllers ”.
6.19. SpaceWire router
The SPWROUTER core is accessed using the command spwrtr, see command description in Appendix B, Com-
mand syntax for more information. It provides commands to display the core’s registers. The command can also
be used to display or setup the routing table.
The info reg command only displays a subset of all the registers available. Add
-all
to the info reg command to
print all registers, or specify one or more register to print a subset. Add
-l
to info reg to list all the register names.
grmon3> info reg -all -l spwrtr0
Содержание GRMON3
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Страница 156: ...GRMON3 UM June 2019 Version 3 1 0 156 www cobham com gaisler SEE ALSO Section 6 13 On chip logic analyzer driver...
Страница 208: ...GRMON3 UM June 2019 Version 3 1 0 208 www cobham com gaisler SEE ALSO Section 3 5 Tcl integration...