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GRMON3-UM
June 2019, Version 3.1.0
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and tell the native debugger. To prevent GRMON from interpreting it as its own breakpoints and stop the CPU
one must use the
-nswb
switch.
3.4.4. Inserting breakpoints and watchpoints
All breakpoints are inserted with the bp command. The subcommand (soft, hard, watch, bus, data, delete) given to
bp determine which type of breakpoint is inserted, if no subcommand is given bp defaults to a software breakpoint.
Instruction breakpoints are inserted using bp soft or bp hard commands. Inserting a software breakpoint will add
a (TA 0x1) instruction by modifying the target's memory before starting the CPU, while bp hard will insert a
hardware breakpoint using one of the IU watchpoint registers. To debug instruction code in read-only memories
or memories which are self-modifying the only option is hardware breakpoints. Note that it's possible to debug
any RAM-based code using software breakpoints, even where traps are disabled such as in trap handlers. Since
hardware breakpoints triggers on the CPU instruction address one must be aware that when the MMU is turned
on, virtual addresses are triggered upon.
CPU data address watchpoints (read-only, write-only or read-write) are inserted using the bp watch command.
Watchpoints can be setup to trigger within a range determined by a bit-mask where a one means that the address
must match the address pattern and a zero mask indicate don't care. The lowest 2-bits are not available, meaning
that 32-bit words are the smallest address that can be watched. Byte accesses can still be watched but accesses to
the neighboring three bytes will also be watched.
AMBA-bus watchpoints can be inserted using bp bus or bp data. When a bus watchpoint is hit the trace buffer
will freeze. The processor can optionally be put in debug mode when the bus watchpoint is hit. This is controlled
by the tmode command:
grmon3> tmode break N
If N = 0, the processor will not be halted when the watchpoint is hit. A value > 0 will break the processor and set
the AHB trace buffer delay counter to the same value.
NOTE: For hardware supported break/watchpoints the target must have been configured accordingly, otherwise
a failure will be reported. Note also that the number of watchpoints implemented varies between designs.
3.4.5. Displaying processor registers
The current register window of a LEON processor can be displayed using the reg command or by accessing the Tcl
cpu
namespace that GRMON provides. GRMON exports
cpu
and
cpuN
where N selects which CPU's registers
are accessed, the
cpu
namespace points to the active CPU selected by the cpu command.
grmon3> reg
INS LOCALS OUTS GLOBALS
0: 00000008 0000000C 00000000 00000000
1: 80000070 00000020 00000000 00000001
2: 00000000 00000000 00000000 00000002
3: 00000000 00000000 00000000 00300003
4: 00000000 00000000 00000000 00040004
5: 00000000 00000000 00000000 00005005
6: 407FFFF0 00000000 407FFFF0 00000606
7: 00000000 00000000 00000000 00000077
psr: F34010E0 wim: 00000002 tbr: 40000060 y: 00000000
pc: 40003E44 be 0x40003FB8
npc: 40003E48 nop
grmon3> puts [format %x $::cpu::iu::o6]
407ffff0
Other register windows can be displayed using reg wN, when N denotes the window number. Use the float com-
mand to show the FPU registers (if present).
3.4.6. Backtracing function calls
When debugging an application it is often most useful to view how the CPU entered the current function. The bt
command analyze the previous stack frames to determine the backtrace. GRMON reads the register windows and
then switches to read from the stack depending on the %WIM and %PSR register.