Cmsemicon CMS80F731 Series, Справочное руководство

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CMS80F731x Reference Manual
1.7 Data Pointer Selection Register (DPS)
The data pointer selects register DPS
0x86 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
DPS ID1 ID0 TSL AT -- -- -- SALT
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7~Bit6 ID<1:0>: Subtract/add function selection.
00= DPTR0 plus 1 or DPTR1 plus 1;
01= DPTR0 minus 1 or DPTR1 plus 1;
10= DPTR0 plus 1 or DPTR1 minus 1;
11= DPTR0 minus 1 or DPTR1 minus 1.
Bit5 TSL: Flip selection enable;
1= After executing the DPTR instruction, the SEL bit is automatically flipped;
0= DPTR-related instructions do not affect the SEL bits.
Bit4 AT: Self-addition/subtraction enable bits;
1= Allows MOVX @DPTR or MOVC @DPTR instructions to run, perform subtractive/self-addition
operations (determined by ID1-ID0).
0= DPTR-related directives do not affect DPTR itself.
Bit3~Bit1 -- Reserved, must be 0.
Bit0 SALT: Data pointer selection bit;
1= Select DPTR1;
0= Select DPTR0.
1.8 Program Status Register (PSW)
Program status register PSW
0xD0 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PSW CY
AND F0
RS1 RS0 OV -- P
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset value 0 0 0 0 0 0 0 0
Bit7 CY: Carry marker bits;
1= There are carry-ons;
0= No carry.
Bit6 AND: Auxiliary carry markers (half-carry markers);
1= There are carry-ons;
0= No carry.
Bit5 F0: Generic flag bits.
Bit4~Bit3 RS<1:0>: Working register BANK select bit;
00= Select Bank0;
01= Select Bank1;
10= Select Bank2;
11= Select Bank3.
Bit2 OV: Overflow flag bit;
1= There is an overflow in arithmetic or logical operations;
0= There is no overflow of arithmetic or logical operations.
Bit1 -- Reserved, must be 0.
Bit0 P: Check bit;
1= The highest level of the result occurred.
0= The highest bit of the result did not occur carry.