VCC-2CXP6R
Rev.905-0187-02
©2019 CIS Corporation. All rights reserved.
12
・
RisingEdge(Timed)
・
FallingEdge(Timed)
TriggerMode
OFF (Free RUN)
ON
(TriggerSelector)
(AcquisitionStart)
(FrameStart)
TriggerSyncMode
TriggerActivation
TriggerSource
= Timeed
ClockSync
LineSync
・
LinkTrigger0
・
Line0
・
TriggerSoftware >Excute
・
LevelHigh(TriggerWidth)
・
LevelLow(TriggerWidth)
5.6.
Trigger Sync. Mode and Delay Time to Start Exposure
・
H sync. trigger mode (LineSync): 1H of jitter may occur from inputting trigger to exposure. (Overlapping operation is
valid.)
・
CLK sync. trigger mode (ClockSync): Less delay time from trigger input, and the precise trigger operation is valid.
(Overlapping operation is invalid.)
Trigger sync. mode and delay time to start exposure
CXP6_X1
CXP3_X1
Exposure delay to start exposure at H sync. trigger (LineSync)
Approx. 4H~5H
Approx. 4H~5H
Exposure delay to start exposure at CLK sync. trigger (ClockSync)
Approx. 0.13us
Approx. 0.13us
5.7.
Restrictions on Trigger Input Timing
□
The next trigger pulse can be input while reading out signals (Readout). However, please do not input a trigger
pulse which ends its exposure while reading out the prior signals. In other words, a trigger pulse, while reading
out signals for the prior frame and starts reading out signals for the next frame, cannot be input.
Exposure Out
TRIG IN
Readout
(FVAL Out)
(Video Out)
Effective Line
(A)
・
When a trigger is input with the restricted timing explained the above, “IllegalTriggerFlag” becomes “1”.
