EES3 Hardware Interface Description
7 Sample Application
113
EES3_HD_v01.100b
Page 113 of 118
2009-08-12
Confidential / Released
Figure 54:
EES3
sample application
R
3)
47k
100k
VCC µC
47k
EMERG_OFF
PWR_IND
BATTEMP
VSENSE
ISENSE
CHARGEGATE
CCGND
CCCLK
CCRST
CCIN
CCVCC
200nF
AGND
EPN1
EPP1
EPP2
EPN2
Digital Audio
7
BC847
BC847
SYNC
CRS04
1nF
10pF
V
up to 7.0V
charge
Sample Application
1)
8
3
4
2
2 x R
P
2
1)
For debug and/or test purposes
test points will have to be provided
for certain lines. For details see
2)
I
2
C lines are shared with SPI
3)
See
for details on size of R and
FET type for charging circuit.
4)
An optional RF blocking capacitor
(10pF) should be located as close as
possible to pad 68/74.